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DIVIDER
AND
PHASE DETECTOR
ASSEMBLY
4.49
The -r!60
signal
via
Q1
and
Q5
clocks IC21,
104
and IC25 downwards
from the
numbers
stored
in
them
from
the
'N' counter.
When
a count of 2
is
reached
this
is
detected
via the gates
IC8b, IC15b, IC24b, IC16d,
IC22c and
IC22d, causing IC8b
to
change
state
and apply
a
'1'
to
the
*
J
1
input of
IC10.
4.50
The
next
clock
pulse from the h.f. divider clocks the 'N' divider
down
to
one and
transfers
the
1
J
1
input of
IC10
to
the
Q
output,
which
turns
on
Q8.
This
applies a
T
to
the
1
K'
of
IC10
and
enters 'N'
back
into
the divider via the preset
enable.
4.51
The
next
clock
pulse
(via
IC10/13)
resets
IC10,
which
feeds a carry output pulse
from
100/14
to
the
phase
detector.
Simultaneously
the
'Q
1
output of IC10
turns
off
Q8,
thus
ending
the preset pulse
and
enabling
the divider
to
begin another count
down.
Q3
is
turned
off
which
sends
IC30/3
low, thus
setting
IC30
to
the -rl
1
mode
in
readiness
for
the next
sequence.
4.52
The
pulse
recurrence frequency
fed
from
100/14
via
TP9
to
the
clock
input of
IC3b
is
the
Range
4
frequency
(128MHz
to
256MHz)
divided
by
the
number
loaded
into the 'N' divider
by
the tuning system.
It
now
remains
to
bring
this
divided frequency
into
coincidence with
the appropriate
channel spacing reference frequency.
This
is
done by
the
phase detector
IC3a/IC3b.
Phase Detector
4.53
The
basic
phase detector
is
IC3a
and
IC3b with
the
NOR
gate IC2a.
The clock
input
to
IC3a/3
is
a reference
frequency received
via the
programmed
divider
I
C
1
9
.
The clock
input
to
IC3b/ll
is
the tuning
information from the 'N' divider.
When
these
two
clock frequencies are
identical the
main
VCO
loop
will
be
in
lock.
If,
however,
they are not
identical the
VCO
varactor
line will
adjust the
d.c.
tuning voltage as
described
in
para.
4.
55.
4.54
The
37.5kHz
reference
at pin 18
(which
is
a fixed
frequency except
when
Fine
Tune
is
in
use)
clocks
the divider
IC19.
This
divider
is
programmed by
the
Channel Spacing
switch
to
divide
by
10,
12 or
15, thus
providing a clock reference of
2.5kHz, 3.125kHz
or
3.75kHz
at
IC3a/3.
The
selected
division
ratio
determines
the
channel spacing.
As
described
in
the Logic
circuit
description (para. 4.
10)
the
37.5kHz
reference
is
variable
when
in
Fine
Tune mode,
thus
providing
analogue
tuning within a
particular
channel spacing.
4.55
The
voltage
on
the
VCO
varactor tuning
line
is
normally determined
by
the
charge
on
the
dominant
capacitor
network C25,
C26
with R59.
If,
for
example,
the
tuning
frequency
at
IC3b/l
1
is
lower than
the reference at
IC3a/3,
an
output
at the
Q
of
|C3a
will turn
on
Q9
and,
via the constant current generator
Q10
feed current
into
C25/C26,
thus
tuning the
VCO
in
the appropriate direction.
4.56
If,
on
the
other
hand,
the tuning
frequency
at
IC3b/ll
is
higher than the
reference, then
Q12
will
be
turned
on by
the
Q
output of IC3b.
This will
draw
current out of
C25/C26
and
thus reverse the tuning direction.
4-9
9081
&
9082 Vol
.
2
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