Philips LC9.3L Service Manual page 38

38 LC9_3L
8.2 Diagrama B06 SSB: HDMI & Multiplexer, Tipo ADV3002 (IC7900), HDMI MUX
Diagrama em Blocos
I2C_ADDR[1:0]
IN_x_DATA2+
IN_x_DATA2–
IN_x_DATA1+
IN_x_DATA1–
IN_x_DATA0+
IN_x_DATA0–
Configuração dos Pinos
SEL[1:0] TX_EN
SERIAL
PARALLEL
I2C_SDA
CONFIG CONTROL
I2C_SCL
INTERFACE
2
AVCC
LOS
+ 4
IN_x_CLK+
–
4
IN_x_CLK–
+
– 4
+
4
4
–
EQ
+
4
– 4
TMDS
AVCC
2
DDC_xxx_A
2
DDC_xxx_B SWITCH
2
DDC_xxx_C CORE
2
DDC_xxx_D
3.3V
CEC_IN
DDC/CEC
BIDIRECTIONAL
REPLICATOR
EDID
P5V_A
P5V_B
P5V_C
P5V_D
EDID EEPROM INTERFACE
HPD_A
HPD_B
HPD_C
HPD_D
HOT PLUG DETECT
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
IN_B_CLK– 1
PIN 1
IN_B_CLK+ 2
HPD_B 3
IN_B_DATA0– 4
IN_B_DATA0+ 5
HPD_A 6
IN_B_DATA1–
7
IN_B_DATA1+ 8
AVCC 9
IN_B_DATA2– 10
IN_B_DATA2+ 11
SEL0 12
IN_A_CLK–
13
IN_A_CLK+ 14
SEL1
15
IN_A_DATA0–
16
IN_A_DATA0+
17
AVCC 18
IN_A_DATA1– 19
IN_A_DATA1+ 20
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
Figura 8-3 Diagrama em Blocos Interno e configuração dos pinos
RESETB
ADV3002
AVCC
AVEE
LOGIC
AVCC
+
OUT_CLK+
–
OUT_CLK–
+
OUT_DATA2+
–
OUT_DATA2–
SWITCH
+
CORE OUT_DATA1+
–
OUT_DATA1–
+
OUT_DATA0+
–
OUT_DATA0–
AVCC
2
DDC_SCL_COM,
DDC_SDA_COM
3.3V
CEC_OUT
EDID_ENABLE
2
CONTROL EDID_SCL,
EDID_SDA
5V
AMUXVCC
COMBINER
HPD
CONTROL
ADV3002
TOP VIEW
(Not to Scale)
60 IN_C_DATA2+
59 IN_C_DATA2–
58 HPD_C
57 IN_C_DATA1+
56 IN_C_DATA1–
55 HPD_D
54 IN_C_DATA0+
53 IN_C_DATA0–
52 AVCC
51 IN_C_CLK+
50 IN_C_CLK–
I2C_ADDR0
49
48 IN_D_DATA2+
IN_D_DATA2–
47
46 AVEE
45 IN_D_DATA1+
44 IN_D_DATA1–
43 AVCC
42 IN_D_DATA0+
41 IN_D_DATA0–