VIORE PDP4210EA Service Manual page 55

PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE
BLOCK DIAGRAM
(Customer)
External
Switches
Control Signal (GPIO, ...)
Analog Front End
CVBS (AV)
(x3)
ADC
S
ADC
YPbPr
ADC
ADC
VGA (aRGB)
Analog Path
Digital
Digital Path
TTL
LVDS Tx
LVDS
3D TVD
3D TVD
HDTVD
VGAD
OSD
Merge
Gamma
Dithering
Page 6
MT8205
MTK CONFIDENTIAL, NO DISCLOSURE
8032
Main Path
MDDi
DS
MLC
PIP Path
PLC
DS
DI
2D Graph
OSD
Color US
DSP
July, 2004