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Model
34S5A
THEORY
OF OPERATION
Section VIII
signal
is
applied
to
the enable input
of
qualifter
gate
UI3C
and
the driver
A
input
of bus
transceiver
U9.
Transceiver
U9
drives the
NRFD
bus
line
low
(true),
indicating the
Voltmeter
has accepted the
data.
The
processor next
sets
the
"ndac"
output (6Q) of
latch
Dll
high
(false).
The
ndac
signal
is
applied
through
inverter
U
lOA
to
the enable input
of
U2B
and
the
signal
input
of U13B. The low
output of
U13B
is
applied
to the driver
B
input
of
transceiver
U9
to
disable
it
and
allow the
NDAC
Bus
line
to
go
high
(false).
8*152.
Execution
of
Command
Instructions.
After
the
command
data has
been
accepted,
as
previously described,
the
main
processor deciphers
the
data to
determine
the
nature
of
the
command.
This
section describes the interface
circuit
response
to
the following
Bus
commands:
a.
"Listen"
Command
b.
"Unlisten"
Command
c.
"Talk"
Command
d.
"Untalk"
Command
8-153.
Listen
CommarxJ.
When
the processor
receives a
listen
address
from
the
HP-IB
it
enables
inverter
U1
and
reads the address
code
the
Voltmeter
has
been
set to.
This
code
is
determined
by
the
settings
of
switch
SI.
The
pro-
cessor
compares
this
code
with
the
one
received to deter-
mine
if
it
has
received
its
listen
address.
Upon
recognizing
the
listen
address
of
the
Voltmeter,
the processor
sets
the
output
(pin 10)
of
U70
low
to
turn
A2CR2
(listen
enunci-
ator)
on
(see
Front
Panel
Assembly
Schematic).
The
pro-
cessor
next
sets
the
"mla"
output (4Q) of
U1
1
high
(true).
The
mla
signal
is
applied,
through
inverter
USD.
to the
input
of
qualifier
gate
U2C
to
maintain
its
output
high.
At
this
point the
Voltmeter
has
been
addressed
to
listen
and
enabled
to receive
data messages.
8-154. Unlisten
Command. Upon
recognizing
the
"un-
listen"
command,
the processor
sets
the
output
(pin 10)
of
latch
U70
high
to
turn
A2CR2
(listen
enunciator) off
(see
Front Panel
Assembly
Schematic).
The
processor
next
sets
the
"mla"
output
(^)
of
latch
U1
1
low
(false)
to return
the
interface
circuit
to
the
"turn-on"
state.
8-155. Talk
Command. When
the
processor
receives
a
"talk" address
from
the
HP-lB
it
enables
inverter
U1
and
reads the address
code
the
Voltmeter has been
set to.
This
code
is
determined
by
the
settings
of
address switch SI.
The
processor
compares
this
code
with
the
one
received
from
the
HP-IB
to
determine
if
it
has
received
its
talk
address.
Upon
recognizing the
talk
address
of
the Volt-
meter. the processor
sets
the
output
(pin 7)
of
latch
U70
low
to
turn
A2CR3
(talk
enuncaitor)
on
(see
Front Panel
Assembly
Schematic).
The
processor next
sets
the
"dav
req"
output (SQ) of
latch
Ull
high
(true).
This
signal
is
applied to the enable input
of
qualifier
gate
U14C. At
this
point the
Voltmeter
has
been
addressed to "talk"
and
is
awaiting the
removal of
the
ATN
signal
by
the
HP-IB
controller
before outputting
measurement
data.
8-156. Untalk
Command. Upon
recognizing the
"untalk"
command,
the processor
sets
the
output
(pin 7)
of
latch
U70
high to turn the "talk" enunciator
(A2CR3)
off
(see
Front Panel
Assembly
Schematic).
The
processor next
sets
the
"dav
req
"output (5Q) of
latch
U
1
1
low
(false)
to return
the interface
circuit
to the
"turn-on"
state.
8-157.
Handshake
Completion.
After
all
instruments
on
the
HP-IB
have accepted
the
command
data
(the
NDAC
Bus
line
has
gone
high) the
HP-IB
controller
sets
DAV
high
(data
is
no
longer
valid).
This
sets
the
receiver
D
output of
transceiver
U9
low.
The low
output of
U9
is
applied to the
input
of
U13A
and through
inverter
UlOC
to the
input
of
qualifier
gate
UI3C
causing
its
output
to
go
high.
The
out-
put
of
U13C
is
applied to the
signal
input
of
buffer
UI5C
and
to
the input
of
interrupt gate
U7A. The
low
output of
U7A
is
applied
to the
input
of
gate
U2A
to
set
the interrupt
signal
to
the
processor.
8-IS8.
Upon
recognizing the interrupt
signal,
the
processor
envies
buffers
UlS
and
UI6and
reads the
interrupt
code.
In this
case
bit
4
is
set,
indicating the
completion of
a
data
byte.
The
processor
determines
the
nature
of
the interrupt
and
sets
the
"ndac"
output (6Q) of
latch
U1
1
low
(true).
The
low output of
Ul
1
is
applied
through
inverter
UlOA
to
the inputs
of
U2B
andUI3B.
If
the
ATN
signal
or the
mla
signal
is
true the
output of
U13B
will
be
set
high.
The
high
output
of
U13B
is
applied
to the driver
B
input
of
trans-
ceiver
U9
to
set
the
NDAC
line
low
(true).
The
processor
next
sets
the
"nrfd" output (IQ) of
Ul
1
low
(false).
The
low output of
Ul
1
is
applied to the driver
A
input
of
U9
to
set
the
NRFD
output
high
(false)
and
to
the input
of
U13C
to
disable
it
and
remove
the interrupt
signal.
This
completes
the
sequence
for
accepting
and executing
com-
mand
statements.
8-159. Receive Data.
Data
received
from
the
HP-IB
Is
used
to
remotely program
the
Voltmeter's
front panel controls
(range, function,
math,
etc.).
The
Voltmeter must
have
pre-
viously
been
addressed to
"listen"
and
set
to
remote
con-
trol
before
it
will
respond
to
program
data messages.
8-160.
The
following paragraphs describe the
interface
cir-
cuit
response
to
program
data messages.
The HP-IB
control-
ler
sets
the
program
information
on Bus
lines
DIOl
through
D108.
After allowing lime
for
the
information
to "settle",
the controller
sets
DAV
(data
valid)
low
(true).
The
DAV
signal sets
the
receiver
D
output
of
transceiver
U9
high
(true).
The
high
output of
U9
is
applied
through
inverter
UlOC
to the input
of
qualifier
gate
UI3C
to
disable
it
and
to
the input
of
U13A. The
output of
UI3A
is
coupled
through
gate
U2B
and
inverter
UIOD
and
applied
to the
input
of
buffer
U15D
and
interrupt gate
U7C. The
low
out-
put
of
U7C
is
applied
to the
input
of
gate
U2A
to
set
the
interrupt
output
to the
main
processor.
8-161.
Upon
recognizing the
interrupt
signal,
the processor
enables buffers
UlS
and
U16
and
reads the status
word.
After determining
the nature
of
the interrupt, the
processor
enables buffers
U17
and
UlS
and
reads the
program
data.
If
the processor has read the
first
byte of program
data
(two
bytes
are
required for
each program
step)
it
sets
a
flag
8-31
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