Interrupt From Pc Cpu T O - Mitsubishi Melsec A User Manual

7. COMMUNICATION WITH PROGRAMMABLE CONTROLLER CPU
/ M E L s E C - A
7.5 Interrupt
from
AD51 t o PC CPU
System subroutine "SIT" causes the AD51 E t o interrupt the A l , A2,
or A3CPU and allows AD51E interrupt sequence programs t o be
executed. The AOJ2CPU cannot be interrupted b y the AD51 E. The
A l , A2, or A3CPU has interrupt pointers, 116 t o 123, which are
assigned t o interrupt signals generated b y special function units in
order of
I10
allocation. For details, refer t o the CPU Unit User's
Manual and Programming Manual.
In the system configuration shown i n Fig. 7.7, when AD51 No. 1
interrupts the PC CPU, the interrupt program designated b y pointer
116 is executed. When AD51 No. 2 interru~ts the PC CPU, interrupt
~-
~
program 117 is executed. (116 has higher pribrity.)
Slot
number 0 1 2 3 4 5 6 7
I
M
XIO
n o n o
XQI
xw n o ~w
1 0 1 0
1 0 10
m m
10
m
XOF X I F XZF X3F W F X6F X8F Y9F
Y ~ O
YQI
YW
n o
m
to to
m
Y3F Y5F Y6F Y8F
AOSI I ~ n t e r r u n l
1 1 0
Location Pointer
Fig.
7.7
System Configuration and lnterrupt Pointers