Block Diagram - Cpu Section - Sony XAV-A1 Service Manual

XAV-A1
5-3. BLOCK DIAGRAM – CPU Section –
XAV-A1
Q801
NV_OPENING 100
Q804
NAVI_OFF 130
65
ACCOFF
Q802
LEVEL SHIFT
SH_MAIN_5 62
IC108
61
MAIN_SH_5
SYSTEM
CONTROLLER 14.7456MHz
IC101(2/5)
LEVEL SHIFT
SH_MAIN2 59
IC107
GPS-MAIN
SWITCH
IC808
5 3
MAIN2_SH 60
2 6
7 1
101
/NV_RST
CP5
5
VDD
3
MAIN_SH
NC
2 SH_MAIN
1
GPS/MAIN
PAL/NTSC
H
(Page 28)
CLK1
44-40,38,
46-48,50,
36-28,26,
52-60,62,
24-22,20,
64-70,72,
18-14,12,
94
10-5
107
106
140
RD/WR
145
/CS_Q2UGN
132 /CS_Q2REG
X801
131
CPU
IC801 /WAIT_Q2
/IRQ_O2
142
146
Q805
162
100 133 134 165
WATCH-DOG
2
4
TIMER
1
Q803 IC802
LVCC 1 RESET
4
IC805
3
OSD CLOCK AMP BUFFER
Q921 IC923
7
6
3 5
CLOCK
CLOCK SELECT
2
GENERATOR
X842
IC897
9.6MHz
6
26 26
DATA BUS DATA BUS
ADDRESS BUS
2,4,5,7,8,
SD0-15
/RD 10,11,13,,42
/RD 78
44,45,47,48,
/WE0
79
/WE0
50,51,53,90
/WE1
/WE1 80
SA2-15
/WE2 23-26,29-34,
/WE2 81
22,35,20,21
/WE3
/WE3 82
RD/WR /WE0
83 15
/FCS RD/WR
16
/FCS 85
/CS3 /CAS
88 17
/CS3
/CS_Q2UGN /RAS
89 18
/CS_Q2REG CKIO
90 38
CKIO /CS3
CKIO 138 19
/RAS /WE1
39
/RAS 96
/CAS
/CAS 98
/WAIT_Q2
104
/IRQ_O2
151
FRDY
FRDY 108
2,4,5,7,8,
SD16-31
10,11,13,,42
44,45,47,48,
50,51,53,90
SA2-15
23-26,29-34,
22,35,20,21
/WE2
15
RD/WR
16
/CAS
17
/RAS
18
CKIO
38
/CS3
19
/WE3
39
/RST_3
AND GATE
IC804
SD0-15
29-36,
38-45
SA1-22
25-18,8-1,48,
17,16,9,10,13
5
/WE0
11
/RES_3
Q2CLK1 12
1 FRDY
15
/FCS
26
/RD
28
IC921
DATA
I
(Page 27)
ADD
CTL
SD-RAM
IC841
SD-RAM
IC842
FLASH MEMORY
IC843