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2 Fibre Channel is a key technology for storage
Fibre Channel is a serial communications technology designed to transfer large amounts of data among
a variety of hardware systems over long distances. It is a key technology for applications that require
shared, high bandwidth access to storage.
Fibre Channel provides a logical, point-to-point,
serial channel for the transfer of data between a
buffer at a source device and a buffer at a
destination device. It moves buffer contents from
one port to another, without regard to the format
or meaning of the data so different upper level
Glossary
Some terms used in the Fibre Channel industry are defined below. More information is available through
the ATTO Technology web site (
(
), Cern (
www.fibrechannel.com
(
), and the Fibre Channel Consortium (
www.snia.org
Term
ANSI
arbitrate
arbitrated loop
auto negotiation
BER
bit
bus
byte
channel
CPU
CRC
destination
address
device driver
DMA
DMA bus master
9 ATTO Technology Inc. Celerity FC Host Adapters Installation and Operation Manual
www.attotech.com
), the Storage Area Networking Industry Association
www.cern.ch
American National Standards Institute
process of selecting one L_Port from a collection of ports which ask for use of the arbitrated loop
at the same time
a loop topology (FC-AL) in which two or more ports are interconnected, but only two ports can
communicate at one time; low-cost solution which may or may not use hubs and switches
hardware senses and automatically responds depending on configuration
Bit Error Rate: a measure of transmission accuracy; the ratio of bits received in error to bits sent
smallest unit of data a computer can process: a single binary digit with a value of either 0 or 1
a collection of unbroken signal lines used to transmit information from one part of a computer
system to another; taps on the lines connect devices to the bus
an ordered set of 8 bits
a point-to-point link which transports data from one point to another
Central Processing Unit: the portion of the computer that actually performs computations
Cyclic Redundancy Check: an error-correcting code which calculates a numeric value for received
and transmitted data; if no error has occurred during transmission, the CRC for both received and
transmitted data should be the same
a value in the frame header of each frame which identifies the port in the node where the frame is
being sent
a program that allows a microprocessor to direct the operation of a peripheral device
Direct Memory Access: a way to move data from a storage device directly to RAM without using
the CPU's resources
allows a peripheral to control the flow of data to and from system memory by block as opposed to
allowing the processor to control the data by bytes (PIO or programmed I/O)
protocols are able to run over Fibre Channel
hardware.
The Fibre Channel architecture is structured as a
hierarchical set of protocol layers. Defined within
these layers are rules for signal interfaces, serial
encoding and decoding, error control, frame
format and communications protocols.
), the Fibre Channel Industry Association
www.iol.unh.edu/consortiums
Definition
, click on FC).
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