Sony HCD-SR1 Service Manual page 123

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Pin No. Pin Name
62 PHREFO
63
64
65
66
67 VDDSD0
68
69
70 ZDFLFE
71 DSALFE
72 VSDSD1
73
74
75
76
77
78, 79 IOUT0, IOUT1
80
81, 82 IOUT2, IOUT3
83
TE
L 13942296513
84, 85 IOUT4, IOUT5
86
87
88
89 IEMPTY
90
91
92
93
94
95
96
97
98
99
100
101 to 105 IDIN0 to IDIN4
www
106
107 to 109 IDIN5 to IDIN7
110
.
111 to 114 WAD0 to WAD3
115
116
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I/O
O Bit clock signal (2.8224 MHz) output to the digital audio processor
ZDFL O Front L-ch Zero data flag detection signal output terminal
DSAL O Front L-ch DSD data output to the digital audio processor
ZDFR O Front R-ch Zero data flag detection signal output terminal
DSAR O Front R-ch DSD data output to the digital audio processor
— Power supply terminal (+3.3V) (for DSD data output)
ZDFC O Center zero data flag detection signal output terminal
DSAC O Center DSD data output to the digital audio processor
O Woofer zero data flag detection signal output terminal
O Woofer DSD data output to the digital audio processor
— Ground terminal (for DSD data output)
ZDFLS O Rear L-ch zero data flag detection signal output terminal
DSALS O Rear L-ch DSD data output to the digital audio processor
ZDFRS O Rear R-ch zero data flag detection signal output terminal
DSARS O Rear R-ch DSD data output to the digital audio processor
VDDSD — Power supply terminal (+3.3V) (For DSD data output)
O Data output terminal for IEEE 1394 link chip interface
VSCB0 — Ground terminal (for core)
O Data output terminal for IEEE 1394 link chip interface
VDCB0 — Power supply terminal (+2.5V) (for core)
O Data output terminal for IEEE 1394 link chip interface
VSIOB0 — Ground terminal (for I/O)
Transmission information data output terminal for IEEE 1394 link chip interface
IANCO O
Not used
Data transmission hold request signal input terminal for IEEE 1394 link chip
IFULL I
interface
High speed transmission request signal input terminal for IEEE 1394 link chip
I
interface
VDIOB0 — Power supply terminal (+3.3V) (for I/O)
IFRM O Frame reference signal output terminal for IEEE 1394 link chip interface Not used
IOUTE O Enable signal output terminal for IEEE 1394 link chip interface
Data transmission clock signal output terminal for IEEE 1394 link chip interface
IBCK O
Not used
VSCB1 — Ground terminal (for core)
IERR I Not used
IANCI I Not used
IPLAN I Not used
IHOLD O Not used
VDCB1 — Power supply terminal (+2.5V) (for core)
IVLD I Not used
I Not used
VSIOB1 — Ground terminal (for I/O)
I Not used
x ao
y
VDIOB1 — Power supply terminal (+3.3V) (for I/O)
i
I External A/D data input terminal for PSP physical disc mark detection
TESTI I Input terminal for the test (normally: fixed at "L")
VSCB2 — Ground terminal (for core)
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8
Q Q
3 6 7 1 3
Not used
Not used
u163
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HCD-SR1/SR2/SR3
2 9 9 4 2 8
Description
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
1 5 0 5 8 2 9 9 4
Not used
m
co
9 9
Not used
2 8 9 9
Not used
Not used
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