Sony HCD-FR1 Service Manual page 131

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DMB08 BOARD IC901 uPD703033BYGF-M59-3BA-A (SYSTEM CONTROLLER)
Pin No. Pin Name
1 DAMP-DATA
2 DAMP-CLK
3 I2C-DATA
4 CQ-RST
5 I2C-CLK
6 DSP-DO
7
8 DIG-CLK
9
10
11
12 DSP-RST
13 DSP-PM
14 DSP-CS
15 DSP-HACN
16 DSP-BST
TE
L 13942296513
17 DSP-GP9
18 DIR-ZERO
19 DIR-ERR
20
21
22 DIR-XST
23
24 DIR-XMODE
25
26 DAMP-RST
27
28 DAMP-MUTEN
29
30
31
32 DAC-CS
33 AD-RST
34
35
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36
37
38
.
39
40
41
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I/O
O Serial data output to the stream processors
O Serial data transfer clock signal output to the stream processors
Communication data bus with the DVD system processor and mechanism
I/O
controller
O Reset signal output to the DVD system processor "L": reset
Communication data reading clock signal input or transfer clock signal output
I/O
with the DVD system processor and mechanism controller
I Write data input from the audio digital signal processor
Read data output to the digital audio interface IC, audio digital signal processor
DIG-DI O
and D/A converter
Clock signal output to the digital audio interface IC, audio digital signal processor
O
and D/A converter
EVDD — Power supply terminal (+5V)
EVSS — Ground terminal
P-PWM O PWM voltage control signal output
O Reset signal output to the audio digital signal processor "L": reset
O PLL reset signal output to the audio digital signal processor
O Chip select signal output to the audio digital signal processor
I Acknowledge signal input from to the audio digital signal processor
O Boot strap signal output to the audio digital signal processor
I Decode signal input from to the audio digital signal processor
I Audio serial data input from the digital audio interface IC
I PLL lock error and data error flag input from the digital audio interface IC
DIR-CE O Chip enable signal output to the digital audio interface IC
VPP — Power supply terminal (for programming)
I Source clock switching monitor input from the digital audio interface IC
DIR-AD O Muting signal output
O System reset signal output to the digital audio interface IC "L": reset
DIRDO I Write data input from the digital audio interface IC
O Reset signal output to the stream processors "L": reset
GP12 — Not used (fixed at "L")
O Muting on/off control signal output to the stream processors
CS1 O Chip select signal output to the stream processor (for front L-ch and R-ch)
CS2 O Chip select signal output to the stream processor (for center and woofer)
CS3 O Chip select signal output to the stream processor (for rear L-ch and R-ch)
O Chip select signal output to the D/A converter
O Reset signal output to the A/D converter and D/A converter
System reset signal input "L": reset
RESET I For several hundreds msec. after the power supply rises, "L" is input, then it
changes to "H"
XT1 I Sub system clock input terminal
XT2 O Sub system clock output terminal
REGC — Capacitance connection terminal
x ao
y
X2 O Main system clock output terminal (20 MHz)
i
X1 I Main system clock input terminal (20 MHz)
VSS — Ground terminal
VDD — Power supply terminal (+5V)
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HCD-FR1/FR8/FR9
2 9 9 4 2 8
Description
"L": reset
1 5 0 5 8 2 9 9 4
Not used
"L": reset
Not used (open)
m
Not used (open)
co
9 9
2 8 9 9
"H": muting on
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