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Contents About This Manual Conventions ...vii National Instruments Documentation ...viii Related Documentation...viii Chapter 1 Introduction What You Need to Get Started ...1-1 Unpacking ...1-2 Software Programming Choices ...1-2 Safety Information ...1-3 Chapter 2 Installing and Configuring Installing the Software ...2-1 Installing the Hardware...2-1...
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Contents Choosing the Type of Routing ... 3-15 Asynchronous Routing ... 3-16 Synchronous Routing ... 3-17 Generating a Single Pulse (Global Software Trigger) ... 3-18 Using the PXI_CLK10 PLL ... 3-19 Chapter 4 Calibration Factory Calibration... 4-1 TCXO Frequency ... 4-1 PXI_CLK10 Phase...
About This Manual Thank you for purchasing the National Instruments NI PXIe-6672 Timing and Synchronization Module. The NI PXIe-6672 enables you to pass PXI timing and trigger signals between two or more PXI Express chassis. The NI PXIe-6672 can generate and route clock signals between devices in multiple chassis, providing a method to synchronize multiple devices in a multichassis PXI Express system.
NI PXIe-6672 This phrase refers to the NI PXIe-6672 module for the PXI Express bus. National Instruments Documentation The NI PXIe-6672 User Manual is one piece of the documentation set for your measurement system. You could have any of several other documents describing your hardware and software.
The LabVIEW Data Acquisition VI Library, a series of virtual instruments for using LabVIEW with National Instruments DAQ hardware, is included with LabVIEW. LabWindows/CVI is a complete ANSI C ADE that features an interactive user interface, code generation tools, and the LabWindows/CVI Data Acquisition and Easy I/O libraries.
Misuse of the product can result in a hazard. You can compromise the safety protection built into the product if the product is damaged in any way. If the product is damaged, return it to National Instruments for repair. Do not substitute parts or modify the product except as described in this document.
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Chapter 1 Introduction Operate the product at or below the installation category hardware label. Measurement circuits are subjected to working voltages and transient stresses (overvoltage) from the circuit to which they are connected during measurement or test. Installation categories establish standard impulse withstand voltage levels that commonly occur in electrical distribution systems.
Chapter 2 Installing and Configuring The slot number printed on the glyph may vary from chassis to chassis. Note The circle inside of the square indicates that the slot may also be used as a PXI Express peripheral slot. The NI PXIe-6672 is now installed. Configuring the Module The NI PXIe-6672 is completely software configurable.
Chapter 3 Hardware Overview Access LED The Access LED indicates the communication status of the NI PXIe-6672. Refer to Figure 3-2 for the location of the Access LED. Table 3-1 summarizes what the Access LED colors represent. Active LED The Active LED can indicate an error or phase-locked loop (PLL) activity. You can change the Active LED to amber, unless an error overrides the selection.
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Chapter 3 Hardware Overview Table 3-3 outlines the function and direction of the signals discussed in detail in the remainder of this chapter. Signal Name Direction PXI_CLK10_IN PXI_CLK10 TCXO Clock CLKIN CLKOUT DDS Clock PXI_STAR <0..16> In/Out PFI <0..5> In/Out PXI_TRIG <0..7>...
Chapter 3 Hardware Overview of the PXI trigger lines is used as the source for the update, frequency generation will not start until a rising edge occurs on the PXI trigger selected. Note NI-Sync software defaults to an immediate update. If a PXI trigger is used instead, the user must specify the update signal source before setting any of the other DDS properties.
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Chapter 3 Hardware Overview Figures 3-3 and 3-4 summarize the routing features of the NI PXIe-6672. The remainder of this chapter details the capabilities and constraints of the routing architecture. Selection PFI 0 Circuitry Selection PFI 1 Circuitry Selection PFI 5 Circuitry PFI 0 PXI_CLK10...
Chapter 3 Hardware Overview Table 3-4 summarizes the sources and destinations of the NI PXIe-6672. The destinations are listed in the horizontal heading row, and the sources are listed in the column at the far left. A ✓ in a cell indicates that the source and destination combination defined by that cell is a valid routing combination.
Chapter 3 Hardware Overview Refer to the the synchronization clock. Note The PFI synchronization clock is the same for all routing operations in which PFI <0..5> is defined as the output, although the divide-down ratio for this clock (full rate, first divider, second divider) may be chosen on a per route basis.
Chapter 3 Hardware Overview Asynchronous Routing Asynchronous routing is the most straightforward method of routing signals. Any asynchronous route can be defined in terms of two signal locations: a source and a destination. A digital pulse or train comes in on the source and is propagated to the destination.
Chapter 3 Hardware Overview the second clock cycle. However, by synchronizing the signal, you can eliminate the ambiguity, and the signal will always be seen in the second clock cycle. One useful feature of synchronous routing is that the signal can be propagated on either the rising or falling edge of the synchronization clock.
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Chapter 3 Hardware Overview • NI PXIe-6672 User Manual If CLKIN is 10 MHz, the NI PXIe-6672 can compensate for distribution delays in the backplane. The feedback in the PLL comes from PXI_CLK10. This PLL makes it possible for the NI PXIe-6672 to align clock edges at CLKIN with the edges of PXI_CLK10 that the modules receive.
Chapter 4 Calibration DDS Initial Phase The phase of the DDS output is adjusted using this constant so that the DDS outputs from multiple NI PXIe-6672 modules are aligned. Additional Information Refer to NI calibration services. NI PXIe-6672 User Manual for additional information on ni.com/calibration ni.com...
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Appendix A Specifications Jitter added to CLKIN Duty cycle distortion of CLKIN to PXI_CLK10_IN without PLL ...±1%, max Required input duty cycle when using PLL...45 to 55% CLKOUT Characteristics Output frequency Duty cycle...43 to 55% Output impedance...50 Ω, nominal Output coupling ...AC Amplitude, software configurable to two voltage levels (low and high drive) The lower limit is load dependent because of the AC coupling.
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Appendix A Specifications Output Characteristics Frequency range ...DC to 105 MHz Output impedance...50 Ω, nominal Output coupling ...DC Voltage level...0 to 1.6 V into 50 Ω; Absolute maximum applied voltage PXI_CLK10 synchronized trigger clock to out time, t Output-to-output skew, synchronous...500 ps, typical PXI_STAR Trigger Characteristics PXI_STAR <0..16>...
Appendix A Specifications Recommended maximum cable length Weight ...0.459 lb (208 g) Power Requirements +3.3 V ...800 mA, max +12 V ...700 mA, max Environment Maximum altitude...2,000 m (800 mbar) Pollution Degree ...2 Indoor use only. Caution When required, clean the NI PXIe-6672 with a soft nonmetallic brush. Make sure that the device is completely dry and free from contaminants before returning it to service.
Certification column. Environmental Management National Instruments is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial not only to the environment but also to NI customers.
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Waste Electrical and Electronic Equipment (WEEE) At the end of their life cycle, all products must be sent to a WEEE recycling EU Customers center. For more information about WEEE recycling centers and National Instruments WEEE initiatives, visit ni.com/environment/weee.htm RoHS...
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Appendix B Technical Support and Professional Services • • If you searched your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual. You also can visit the Worldwide Offices section of office Web sites, which provide up-to-date contact information, support phone numbers, email addresses, and current events.
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Glossary backplane An assembly, typically a printed circuit board (PCB), with connectors and signal paths that bus the connector pins. The group of conductors that interconnect individual circuitry in a computer. Typically, a bus is the expansion vehicle to which I/O or other devices are connected.
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The requesting or controlling device in a master/slave configuration. Measurement & A controlled centralized configuration environment that allows you to Automation Explorer configure all of your National Instruments DAQ, GPIB, IMAQ, IVI, (MAX) Motion, VISA, and VXI devices. NI-DAQ National Instruments driver software for DAQ hardware.
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The amount of time required for a signal to pass through a circuit. A rugged, open system for modular instrumentation based on CompactPCI, with special mechanical, electrical, and software features. The PXIbus standard was originally developed by National Instruments in 1997, and is now managed by the PXIbus Systems Alliance. PXI Express An open system for modular instrumentation based on PXI and CompactPCI Express.
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Glossary seconds skew The actual time difference between two events that would ideally occur simultaneously. Inter-channel skew is an example of the time differences introduced by different characteristics of multiple channels. Skew can occur between channels on one module, or between channels on separate modules (intermodule skew).
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Index documentation conventions used in manual, vii NI resources, B-1 related documentation, viii drivers (NI resources), B-1 electromagnetic compatibility, A-8 equipment, getting started, 1-1 examples (NI resources), B-1 factory calibration, 4-1 frequency tuning word, 3-7 front panel See also CLKIN connector; CLKOUT connector;...
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National Instruments support and services, B-1 NI PXI-6653, parts locator diagram, 3-3 NI PXI-665x configuration, 2-2 connectors, 3-5 functional overview, 3-5 installation hardware, 2-1 software, 2-1 NI support and services, B-1 operating environment specifications, A-6 PFI <0..5> connector description, 3-5...
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Index PXI_Trig/PXI_Star synchronization clock possible sources, 3-14 using the PXI triggers, 3-14 reflections, recommended cable configuration, 3-13 related documentation, viii resistors, terminating signals (note), 3-12 routing architecture (figure), 3-10 routing signals front panel triggers using as inputs, 3-12 using as outputs, 3-13 generating a single pulse (trigger), 3-18 overview, 3-9 possible sources and destinations...