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DAQ S Series NI 6124/6154 User Manual DAQ-STC2 S Series Simultaneous Sampling Multifunction Input/Output Devices NI 6124/6154 User Manual August 2008 372613A-01...
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Instruments Corporation. National Instruments respects the intellectual property of others, and we ask our users to do the same. NI software is protected by copyright and other intellectual property laws. Where NI software may be used to reproduce software or other materials belonging to others, you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction.
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These classes are known as Class A (for use in industrial-commercial locations only) or Class B (for use in residential or commercial locations). All National Instruments (NI) products are FCC Class A products. Depending on where it is operated, this Class A product could be subject to restrictions in the FCC rules. (In Canada, the Department of Communications (DOC), of Industry Canada, regulates wireless interference in much the same way.) Digital...
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Contents Connecting Analog Input Signals.................. 4-6 Types of Signal Sources.................. 4-7 Differential Connections for Ground-Referenced Signal Sources....4-7 Common-Mode Signal Rejection Considerations ......4-9 Differential Connections for Non-Referenced or Floating Signal Sources ..4-9 DC-Coupled..................4-10 AC-Coupled..................4-11 Field Wiring Considerations ................4-11 Minimizing Drift in Differential Mode ............
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Contents Period Measurement ..................7-6 Single Period Measurement.............. 7-6 Buffered Period Measurement............7-7 Semi-Period Measurement ................7-7 Single Semi-Period Measurement ............ 7-8 Buffered Semi-Period Measurement ..........7-8 Frequency Measurement ................. 7-9 Choosing a Method for Measuring Frequency ......... 7-12 Position Measurement..................7-14 Measurements Using Quadrature Encoders........
About This Manual The NI 6124/6154 User Manual contains information about using the National Instruments S Series NI 6124 and NI 6154 data acquisition (DAQ) devices with NI-DAQmx 8.8 and later. Conventions The following conventions appear in this manual: <>...
Start»All Programs»National Instruments»NI-DAQ»DAQ Getting Started Guide. The NI-DAQ Readme lists which devices are supported by this version of NI-DAQmx. Select Start»All Programs»National Instruments» NI-DAQ»NI-DAQ Readme. The NI-DAQmx Help contains general information about measurement concepts, key NI-DAQmx concepts, and common applications that are applicable to all programming environments.
Select Start»All Programs»National Instruments»NI-DAQ»NI-DAQmx Help. The NI-DAQmx C Reference Help describes the NI-DAQmx Library functions, which you can use with National Instruments data acquisition devices to develop instrumentation, acquisition, and control applications. Select Start»All Programs»National Instruments»NI-DAQ» NI-DAQmx C Reference Help.
Chapter 1 Getting Started Installing the Hardware The DAQ Getting Started Guide contains non-software-specific information about how to install PCI and PXI Express devices, as well as accessories and cables. Device Self-Calibration NI recommends that you self-calibrate your S Series device after installation and whenever the ambient temperature changes.
Chapter 2 DAQ System Overview DAQ Hardware DAQ hardware digitizes signals, performs D/A conversions to generate analog output signals, and measures and controls digital I/O signals. The following sections contain more information about specific components of the DAQ hardware. Figure 2-2 shows the components of the non-isolated S Series (NI 6124) device.
Chapter 2 DAQ System Overview • Two flexible 32-bit counter/timer modules with hardware gating • Digital waveform acquisition and generation • Static DIO signals • True 5 V high current drive DO • PLL for clock synchronization • PCI/PXI interface •...
The accuracy specifications of your device change depending on how long it has been since your last external calibration. National Instruments recommends that you calibrate your device at least as often as the intervals listed in the accuracy specifications.
NI-DAQmx Help or the LabVIEW Help in version 8.0 or later. Programming Devices in Software National Instruments measurement devices are packaged with NI-DAQmx driver software, an extensive library of functions and VIs you can call from your application software, such as LabVIEW or LabWindows/CVI, to program all the features of your NI measurement devices.
Chapter 3 I/O Connector Table 3-1. NI 6124 Device Signal Descriptions (Continued) I/O Connector Pin Reference Direction Signal Description P0.<0..7> D GND Input or Output Digital I/O Channels 0 through 7—You can individually configure each signal as an input or output. P0.6 and P0.7 can also control the up/down signal of Counters 0 and 1, respectively.
Chapter 4 Analog Input On S Series devices, each channel uses its own instrumentation amplifier, FIFO, multiplexer (mux), and A/D converter (ADC) to achieve simultaneous data acquisition. The main blocks featured in the S Series analog input circuitry are as follows: •...
Chapter 4 Analog Input Working Voltage Range On most S Series devices, the PGIA operates normally by amplifying signals of interest while rejecting common-mode signals under the following three conditions: • The common-mode voltage (V ), which is equivalent to subtracting AI <0..x>...
Chapter 4 Analog Input Analog Input Triggering Analog input supports two different triggering actions: start and reference. An analog or digital hardware trigger can initiate these actions. All S Series devices support digital triggering, and some also support analog triggering. To find your device’s triggering options, refer to the specifications document for your device.
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Chapter 4 Analog Input Non-Isolated S Series Device Instrumentation AI 0+ Amplifier Ground- Referenced Signal Source – AI 0– Measured – Voltage Common- – Mode Noise and Ground Potential – AI 0 GND I/O Connector AI 0 Connections Shown Figure 4-3. Differential Connection for Ground-Referenced Signals on Non-Isolated Devices Figure 4-4 shows how to connect a ground-referenced signal source to a channel on an isolated S Series device.
Chapter 4 Analog Input Figure 4-5 shows a bias resistor connected between AI 0 – and the floating signal source ground. This resistor provides a return path for the bias current. A value of 10 kΩ to 100 kΩ is usually sufficient. If you do not use the resistor and the source is truly floating, the source is not likely to remain within the common-mode signal range of the instrumentation amplifier, so the instrumentation amplifier saturates, causing erroneous readings.
Chapter 4 Analog Input Minimize noise pickup and maximize measurement accuracy by taking the following precautions. • Use differential AI connections to reject common-mode noise. • Use individually shielded, twisted-pair wires to connect AI signals to the device. With this type of wire, the signals attached to the AI + and AI –...
Chapter 4 Analog Input If an AI Reference Trigger (ai/ReferenceTrigger) pulse occurs before the specified number of pretrigger samples are acquired, the trigger pulse is ignored. Otherwise, when the AI Reference Trigger pulse occurs, the sample counter value decrements until the specified number of posttrigger samples have been acquired.
Chapter 4 Analog Input Figure 4-9 shows the relationship of AI Sample Clock to AI Start Trigger. AI Sample Clock Timebase AI Start Trigger AI Sample Clock Delay From Start Trigger Figure 4-9. AI Sample Clock and AI Start Trigger AI Sample Clock Timebase Signal You can route any of the following signals to be the AI Sample Clock Timebase (ai/SampleClockTimebase) signal:...
Chapter 4 Analog Input AI Hold Complete Event Signal The AI Hold Complete Event (ai/HoldCompleteEvent) signal generates a pulse after each A/D conversion begins. You can route ai/HoldCompleteEvent out to any PFI <0..15> or RTSI <0..7> terminal. The polarity of ai/HoldCompleteEvent is software-selectable, but is typically configured so that a low-to-high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed.
Chapter 4 Analog Input When the reference trigger occurs, the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired. Figure 4-10 shows the final buffer. Reference Trigger Pretrigger Samples Complete Buffer Figure 4-10.
Chapter 5 Analog Output The main blocks featured in the S Series analog output circuitry are as follows: • AO FIFO—The AO FIFO enables analog output waveform generation. It is a first-in-first-out (FIFO) memory buffer between the computer and the DACs that allows you to download all the points of a waveform to your board without host computer interaction.
Chapter 5 Analog Output With FIFO regeneration, the entire buffer is downloaded to the FIFO and regenerated from there. After the data is downloaded, new data cannot be written to the FIFO. To use FIFO regeneration, the entire buffer must fit within the FIFO size. The advantage of using FIFO regeneration is that it does not require communication with the main host memory after the operation is started, thereby preventing any problems that may occur due to excessive bus...
Chapter 5 Analog Output Waveform Generation Timing Signals There is one AO Sample Clock that causes all AO channels to update simultaneously. Figure 5-5 summarizes the timing and routing options provided by the analog output timing engine. Ctr1InternalOutput PFI 0–9, RTSI 7 Master PFI 0–9,...
Chapter 5 Analog Output Figure 5-7 shows the relationship of the AO Sample Clock signal to the AO Start Trigger signal. AO Sample Clock Timebase AO Start Trigger AO Sample Clock Delay From Start Trigger Figure 5-7. AO Sample Clock and AO Start Trigger AO Sample Clock Timebase Signal You can select any PFI or RTSI pin as well as many other internal signals as the AO Sample Clock Timebase (ao/SampleClockTimebase) signal.
Chapter 5 Analog Output Figure 5-9 shows the timing requirements of the AO Start Trigger digital source. Rising-Edge Polarity Falling-Edge Polarity = 10 ns minimum Figure 5-9. AO Start Trigger Timing Requirements Using an Analog Source When you use an analog trigger source, the waveform generation begins on the first rising edge of the Analog Comparison Event signal.
Chapter 6 Digital I/O Figure 6-1 shows the circuitry of one DIO line. Each DIO line is similar. The following sections provide information about the various parts of the DIO circuit. DO Waveform Generation FIFO DO Sample Clock Static DO Buffer I/O Protection P0.
Chapter 6 Digital I/O You can configure each DIO line to be an output, a static input, or a digital waveform acquisition input. DI Sample Clock Signal (NI 6124 Only) Use the DI Sample Clock (di/SampleClock) signal to sample the P0.<0..7> terminals and store the result in the DI waveform acquisition FIFO.
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Chapter 6 Digital I/O Using an Internal Source To use DO Sample Clock with an internal source, specify the signal source and the polarity of the signal. The source can be any of the following signals: • AI Sample Clock (ai/SampleClock) •...
Chapter 6 Digital I/O DI Change Detection for Non-Isolated Devices (NI 6124 Only) You can configure the DAQ device to detect changes in the DIO signals. Figure 6-3 shows a block diagram of the DIO change detection circuitry. Enable P0.0 Synch Enable Change Detection Event...
Chapter 6 Digital I/O +5 V PFI <4..7>/ P1.<4..7> PFI <0..3>/ TTL Signal P1.<0..3> +5 V Switch D GND I/O Connector Non-Isolated S Series Device Figure 6-4. Digital I/O Connections Caution Exceeding the maximum input voltage ratings, which are listed in the specifications document for each non-isolated DAQ-STC2 S Series device, can damage the DAQ device and the computer.
Chapter 6 Digital I/O I/O Protection for Isolated Devices (NI 6154 Only) Each DIO and PFI signal is protected against over-voltage, under-voltage, and over-current conditions as well as ESD events. However, you should avoid these fault conditions by following these guidelines: •...
Chapter 7 Counters The counters have seven input signals, although in most applications only a few inputs are used. For information about connecting counter signals, refer to the Default Counter/Timer Pinouts section. Counter Input Applications Counting Edges In edge counting applications, the counter counts edges on its Source after the counter is armed.
Chapter 7 Counters Controlling the Direction of Counting In edge counting applications, the counter can count up or down. You can configure the counter to do the following: • Always count up • Always count down • Count up when the Counter n B input is high; count down when it is For information about connecting counter signals, refer to the Default Counter/Timer Pinouts...
Chapter 7 Counters condition is not met, consider using duplicate count prevention, described in the Duplicate Count Prevention section. For information about connecting counter signals, refer to the Default Counter/Timer Pinouts section. Period Measurement In period measurements, the counter measures a period on its Gate input signal after the counter is armed.
Chapter 7 Counters You can route an internal or external periodic clock signal (with a known period) to the Source input of the counter. The counter counts the number of rising (or falling) edges occurring on the Source input between two edges of the Gate signal.
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Chapter 7 Counters You can configure the counter to make K + 1 buffered period measurements. Recall that the first period measurement in the buffer should be discarded. Average the remaining K period measurements to determine the average period of F1. The frequency of F1 is the inverse of the average period.
Chapter 7 Counters You can route the signal to measure to the Source input of Counter 0, as shown in Figure 7-13. Assume this signal to measure has frequency F1. Configure Counter 0 to generate a single pulse that is the width of N periods of the source input signal.
Chapter 7 Counters Table 7-2 summarizes some of the differences in methods of measuring frequency. Table 7-2. Frequency Measurement Method Comparison Measures High Measures Low Number of Number of Frequency Frequency Counters Measurements Signals Signals Method Used Returned Accurately Accurately Poor Good Many...
Chapter 7 Counters Channel Z behavior—when it goes high and how long it stays high—differs with quadrature encoder designs. You must refer to the documentation for your quadrature encoder to obtain timing of channel Z with respect to channels A and B. You must then ensure that channel Z is high during at least a portion of the phase you specify for reload.
Chapter 7 Counters You can configure the rising or falling edge of the Aux input to be the active edge. You can configure the rising or falling edge of the Gate input to be the active edge. Use this type of measurement to count events or measure the time that occurs between edges on two signals.
Chapter 7 Counters Figure 7-22 shows a generation of a pulse with a pulse delay of four and a pulse width of three (using the rising edge of Source). Counter Armed SOURCE Figure 7-22. Single Pulse Generation Single Pulse Generation with Start Trigger The counter can output a single pulse in response to one pulse on a hardware Start Trigger signal.
Chapter 7 Counters You also can use the Gate input of the counter as a Pause Trigger (if it is not used as a Start Trigger). The counter pauses pulse generation when the Pause Trigger is active. Figure 7-25 shows a continuous pulse train generation (using the rising edge of Source).
Chapter 7 Counters Frequency Output can be routed out to any PFI <0..15> or RTSI <0..7> terminal. All PFI terminals are set to high-impedance at startup. The FREQ OUT signal also can be routed to DO Sample Clock and DI Sample Clock. In software, program the frequency generator as you would program one of the counters for pulse train generation.
Chapter 7 Counters Counter n Source Signal The selected edge of the Counter n Source signal increments and decrements the counter value depending on the application the counter is performing. Table 7-3 lists how this terminal is used in various applications.
Chapter 7 Counters Counter n Aux Signal The Counter n Aux signal indicates the first edge in a two-signal edge-separation measurement. Routing a Signal to Counter n Aux Each counter has independent input selectors for the Counter n Aux signal. Any of the following signals can be routed to the Counter n Aux input: •...
Chapter 7 Counters With pulse or pulse train generation tasks, the counter drives the pulse(s) on the Counter n Internal Output signal. The Counter n Internal Output signal can be internally routed to be a counter/timer input or an “external” source for AI, AO, DI, or DO timing signals.
Chapter 7 Counters Other Counter Features Cascading Counters You can internally route the Counter n Internal Output and Counter n TC signals of each counter to the Gate inputs of the other counter. By cascading two counters together, you can effectively create a 64-bit counter. By cascading counters, you also can enable other applications.
Chapter 7 Counters External Signal Prescaler Rollover (Used as Source by Counter) Counter Value Figure 7-31. Prescaling Prescaling is intended to be used for frequency measurement where the measurement is made on a continuous, repetitive signal. The prescaling counter cannot be read; therefore, you cannot determine how many edges have occurred since the previous rollover.
Chapter 7 Counters Example Application That Works Incorrectly (Duplicate Counting) In Figure 7-33, after the first rising edge of Gate, no Source pulses occur, so the counter does not write the correct data to the buffer. No Source edge, so no value written to buffer.
Chapter 7 Counters In DAQmx, the device uses 80 MHz source mode if you perform the following: • Perform a position measurement • Select duplicate count prevention Otherwise, the mode depends on the signal that drives Counter n Source. Table 7-5 describes the conditions for each mode. Table 7-5.
Chapter 8 Programmable Function Interfaces (PFI) Each PFI input also has a programmable debouncing filter. Figure 8-1 shows the circuitry of one PFI line. Each PFI line is similar. Timing Signals Static DO Buffer PFI x /P1 or I/O Protection PFI x /P2 Direction Control Static DI...
Chapter 8 Programmable Function Interfaces (PFI) Using PFI Terminals as Timing Input Signals Use PFI terminals to route external timing signals to many different S Series functions. Each PFI terminal (or input PFI terminal) can be routed to any of the following signals: •...
Chapter 8 Programmable Function Interfaces (PFI) Connecting PFI Input Signals All PFI input connections are referenced to D GND. Figure 8-4 shows this reference, and how to connect an external PFI 0 source and an external PFI 2 source to two PFI terminals. PFI 0 PFI 2 PFI 0...
Chapter 8 Programmable Function Interfaces (PFI) I/O Protection Each DIO and PFI signal is protected against overvoltage, undervoltage, and overcurrent conditions as well as ESD events. However, you should avoid these fault conditions by following these guidelines: • If you configure a PFI or DIO line as an output, do not connect it to any external signal source, ground, or power supply.
Chapter 9 Digital Routing and Clock Generation 80 MHz Timebase The 80 MHz Timebase can be used as the Source input to the 32-bit general-purpose counter/timers. The 80 MHz Timebase is generated from the following sources: • Onboard oscillator • External signal (by using the external reference clock) 20 MHz Timebase The 20 MHz Timebase normally generates many of the AI and AO timing...
• Share trigger signals between devices Many National Instruments DAQ, motion, vision, and CAN devices support RTSI. In a PCI system, the RTSI bus consists of the RTSI bus interface and a ribbon cable. The bus can route timing and trigger signals between several functions on as many as five DAQ, vision, motion, or CAN devices in the computer.
Chapter 9 Digital Routing and Clock Generation • Counter n Source, Gate, Z, Internal Output • Change Detection Event • Analog Comparison Event • FREQ OUT • PFI <0..5> Note Signals with a * are inverted before being driven on the RTSI terminals. Using RTSI Terminals as Timing Input Signals You can use RTSI terminals to route external timing signals to many different S Series functions.
Chapter 9 Digital Routing and Clock Generation Refer to the KnowledgeBase document, Digital Filtering with M Series and CompactDAQ, for more information about digital filters and counters. To access this KnowledgeBase, go to and enter the info ni.com/info code rddfms PXI Clock and Trigger Signals (NI 6124 Only) PXI clock and trigger signals are only available on PXI and...
Chapter 9 Digital Routing and Clock Generation The filter setting for each input can be configured independently. On power up, the filters are disabled. Figure 9-4 shows an example of a low to high transition on an input that has its filter set to 125 ns (N = 5). RTSI, PFI, or Filtered input goes PXI_STAR Terminal...
CPU. This method makes DMA the fastest available data transfer method. National Instruments uses DMA hardware and software technology to achieve high throughput rates and to increase system utilization. DMA is the default method of data transfer for DAQ devices that support it.
Chapter 11 Triggering Figure 11-1 shows a falling-edge trigger. Digital Trigger Falling edge initiates acquisition Figure 11-1. Falling-Edge Trigger You can also program your DAQ device to perform an action in response to a trigger from a digital source. The action can affect the following: •...
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Chapter 11 Triggering In below-level analog triggering mode, shown in Figure 11-3, the trigger is generated when the signal value is less than Level. Level Analog Comparison Event Figure 11-3. Below-Level Analog Triggering Mode In above-level analog triggering mode, shown in Figure 11-4, the trigger is generated when the signal value is greater than Level.
Chapter 11 Triggering Analog Window Triggering—An analog window trigger occurs • when an analog signal either passes into (enters) or passes out of (leaves) a window defined by two voltage levels. Specify the levels by setting the window Top value and the window Bottom value. Figure 11-7 demonstrates a trigger that asserts when the signal enters the window.
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Appendix A Device-Specific Information Note The AO channels do not have analog or digital filtering hardware and do produce images in the frequency domain related to the update rate. NI 6124 I/O Connector Pinout Figure A-1 shows the pin assignments for the 68-pin connector on the NI 6124.
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Appendix A Device-Specific Information NI 6124 Block Diagram Figure A-2 shows the NI 6124 block diagram. AI Data ADC(0) 16-Bit PGIA Channel Cal Relay AI Convert(0) Control(0) Control(0) 16-Bit AI Data ADC(1) PGIA Channel Board Cal Relay AI Convert(1) Control(1) Power Control(1) Spartan-3A...
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Appendix A Device-Specific Information Mating connectors and a backshell kit for making custom 68-pin cables are available from NI. NI recommends that you use one of the following connectors with the I/O connector on your device. • Honda 68-position, solder cup, female connector •...
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Appendix A Device-Specific Information NI 6154 I/O Connector Pinout Figure A-3 shows the pin assignments for the 37-pin I/O connector on the NI 6154. AI 0– AI 0+ AI 1– AI 1+ AI 2– AI 2+ AI 3– AI 3+ AO 0–...
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Appendix A Device-Specific Information NI 6154 Block Diagram Figure A-4 shows the NI 6154 block diagram. Circuit AI 0 PGIA 16-Bit FPGA AO 0 AO 0 PGIA 16-Bit AI 1 PGIA 16-Bit AO 1 AO 1 PGIA 16-Bit Analog Analog Output Input AI 2...
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DB37M-DB37F-EP—37-pin male-to-female enhanced performance shielded I/O cable, 1 m (EMI shielding) For more information about optional equipment available from National Instruments, refer to the National Instruments catalog or visit the National Instruments Web site at ni.com NI 6154 Isolation and Digital Isolators The NI 6154 is an isolated data acquisition device.
Appendix A Device-Specific Information The non-isolated ground is connected to the chassis ground of the PC or chassis where the device is installed. The isolated ground is not connected to the chassis ground of the PC or chassis. The isolated ground can be at a higher or lower voltage relative to the non-isolated ground.
Technical Support and Professional Services Visit the following sections of the award-winning National Instruments Web site at for technical support and professional services: ni.com • Support—Technical support at includes the ni.com/support following resources: – Self-Help Technical Resources—For answers and solutions,...
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Appendix B Technical Support and Professional Services Declaration of Conformity (DoC)—A DoC is our claim of • compliance with the Council of the European Communities using the manufacturer’s declaration of conformity. This system affords the user protection for electromagnetic compatibility (EMC) and product safety.
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Glossary Analog-to-digital converter—an electronic device, often an integrated circuit, that converts an analog voltage to a digital number. Application Development Environment—a software environment incorporating the development, debug, and analysis tools for software development. LabVIEW, Measurement Studio, and Visual Studio are examples.
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Glossary Digital-to-analog. Digital-to-analog converter—an electronic device, often an integrated circuit, that converts a digital number into a corresponding analog voltage or current. See data acquisition (DAQ). DAQ device A device that acquires or generates data and can contain multiple channels and conversion devices.
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Glossary FPGA Field-programmable gate array. gain The factor by which a signal is amplified, often expressed in dB. Gain as a function of frequency is commonly referred to as the magnitude of the frequency response function. grounded signal Signal sources with voltage sources that are referenced to a system ground sources such as the earth or building ground.
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The time for a signal to transition from 10% to 90% of the maximum signal amplitude. Root mean square. RTSI bus Real-Time System Integration bus—the National Instruments timing bus that connects DAQ devices directly, by means of connectors on top of the devices, for precise synchronization of functions. NI 6124/6154 User Manual...
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Glossary Gate pulse width. Total harmonic distortion—the ratio of the total rms signal due to harmonic distortion to the overall rms signal, in dB or percent. THD+N Signal-to-THD plus noise—the ratio in decibels of the overall rms signal to the rms signal of harmonic distortion, plus noise introduced. thermocouple A temperature sensor created by joining two dissimilar metals.
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Index example, 7-35 triggering, 11-1 waveform acquisition, 6-3 prevention example, 7-36 waveform generation, 6-5 digital I/O, 6-1 block diagram, 6-2 edge counting, 7-2 circuitry, 6-2 buffered, 7-3 connecting signals, 6-9 on-demand, 7-2 DI change detection, 6-8 sample clock, 7-3 digital waveform generation, 6-5 single point, 7-2 getting started with applications in edge-separation measurement...
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7-31 mux, 4-2 period measurement, 7-6 buffered, 7-7 single, 7-6 PFI, 8-1, 8-2 National Instruments support and services, B-1 connecting input signals, 8-6 .NET languages documentation, xiv exporting timing output signals using PFI terminals, 8-4 NI 6124, A-4...
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Index software, 1-1 signals AI Convert Clock, 4-16 AI applications, 4-21 AI Convert Clock Timebase, 4-17 AO applications, 5-11 AI Reference Trigger, 4-19 DIO applications for isolated devices, 6-13 AI Sample Clock, 4-14 NI resources, B-1 AI Sample Clock Timebase, 4-16 programming devices, 2-6 AI Start Trigger, 4-18 routing signals in, 9-10...
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