Sony hcd-hdx501W Service Manual page 94

HCD-HDX500/HDX501W
QQ
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Pin No. Pin Name
109
GND
110 VDDINT
111
GND
112
VDDINT
113
GND
114 VDDINT
115
GND
116
VDDEXT
117
GND
118 VDDINT
119
GND
120
VDDINT
121
RESET*
122 SPIDS*
123
GND
124
VDDINT
125
SPICLK
126 MISO
127 MOSI
TE
L 13942296513
128
GND
129 VDDINT
130
VDDEXT
131
AVDD
132
AVSS
133 GND
134
CLKOUT
135
EMU*
136
TDO
137 TDI
138
TRST*
139
TCK
140
TMS
141 GND
142
CLKIN
143
XTAL
144
VDDEXT
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I/O
-
Ground terminal
- Power supply terminal (+1.2V) (for core)
-
Ground terminal
-
Power supply terminal (+1.2V) (for core)
-
Ground terminal
- Power supply terminal (+1.2V) (for core)
-
Ground terminal
-
Power supply terminal (+3.3V) (for I/O)
-
Ground terminal
- Power supply terminal (+1.2V) (for core)
-
Ground terminal
-
Power supply terminal (+1.2V) (for core)
I
Reset signal input from the system controller "L": reset
I Device selection signal input from the system controller
-
Ground terminal
-
Power supply terminal (+1.2V) (for core)
I
Serial data transfer clock signal input from the system controller
When DSP is master: Serial data input from the flash memory
I/O
When DSP is slave: Serial data output to the main system controller
When DSP is master: Serial data output to the flash memory
I/O
When DSP is slave: Serial data input from the main system controller
-
Ground terminal
- Power supply terminal (+1.2V) (for core)
-
Power supply terminal (+3.3V) (for I/O)
-
Power supply terminal (+1.2V) (analog system)
-
Ground terminal (analog system)
- Ground terminal
O
Local clock signal output terminal Not used
O
Emulation status signal output terminal Not used
O
Test data output terminal (for JTAG) Not used
I Test data input terminal (for JTAG) Not used
I
Test reset signal input terminal (for JTAG) Not used
I
Test clock signal input terminal (for JTAG) Not used
I
Test mode select signal input terminal (for JTAG) Not used
- Ground terminal
I
System clock input terminal (25 MHz)
O
System clock output terminal (25 MHz)
-
Power supply terminal (+3.3V) (for I/O)
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Description
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