Mpeg Section - Sanyo DCS-AVD8501 Service Manual

IC BLOCK DIAGRAM & DESCRIPTION

-MPEG SECTION-

IC871,881 LE28DW8102T-90-MPB (Flash Memory)
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
9
WE#
10
NC
11
NC
12
NC
13
NC
14
NC
15
NC
16
A18
17
A17
18
A78
19
A6
20
A5
21
A4
22
A3
23
A2
24
ACE#
Symbol
A18
A17-A0
A17-A15
A17-A10
DQ15-DQ0
CE#
OE#
WE#
VDD
GND
NC
IC804,805 TC74LCX373FT (Low Voltage Octal D-type Latch with 5V Tolerant Inputs and Outputs)
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
LE 11
1
OE
48 A16
47 VSS
Charge Pump
46
DQ15
45
DQ7
44 Constant Voltage
DQ14
43
DQ6
42
DQ13
41
DQ5
40 DQ12 Address Buffer
39 DQ4
38
NC
Latch Circuit
37
VDD
36
DQ11
35
DQ3
34
DQ10 A18-A0
33
DQ2
32 DQ9
31 DQ1
CE#
30
DQ8
29 OE#
DQ0
28
OE# WE#
27
VSS
26
A0
25
A1
Description
Bank select address
Flash bank address
Flash bank block address
Flash bank selector address
Data input/output
Use able the chip
Able to output
Able to write on
Power supply
Ground
No connect
1 20 V
CC
2 19 Q7
3 18 D7
4 17 D6
5 16 Q6
6 15 Q5
7 14 D5
8 13 D4
9 12 Q4
10 11 LE
Truth Table
D0
D1 D2
3
4
D
D
Q
Q
L
L
2
5
Q0
Q1
Column Decoder
&
Circuit
& Low Decoder
Control Logic
Function
Select Bank 1 (negative) or Bank 2 (positive)
Flash bank address at write on
Select at flash bank for erase
Select at flash bank sector for erase
Output the data while lead cicle and receive the input data
while write on cicle
Use able the data flash bank when CE# is negative
Use able the data output buffer
Write on, Erase, Program control
Power supply (2.07V~3.6V)
Ground
No connect
INPUTS
OE LE
H X
L L
L H
L H
X : Don't Care
Z : High impedance
Qn : Q Output level before LE turn into "L"
D3 D4
7 8 13
D D D
Q Q Q
L L L
6 9 12
Q2 Q3 Q4
- 66 -
256Kx16
Flash
Bank 1
256Kx16
Flash
Bank 2
DQ15.DQ0
Input/Output
Buffer Data Latch
OUTPUTS
D
X Z
X Qn
L L
H H
D7
D5 D6
18
14 17
D
D D
Q
Q Q
L
L L
19
15 16
Q7
Q5 Q6