Camera Block Diagram - Sony MVC-FD75 Service Manual

MVC-FD75

3-2. CAMERA BLOCK DIAGRAM

CD-338 BOARD
1.0 Vp-p
IC401
66 µsec
CCD IMAGER
IC401 7 REC
(SEE PAGE 4-8)
CN401 CN101
Q401
CCD OUT
CCD OUT 7 BUFFER 2 15
6.0 Vp-p
66 µsec
IC401 1, 2 REC
V1
V1 1 7 10
V3
V3 2 6 11
V2A
V2A 3
5 12
V2B
V2B 4 4 13
5.8 Vp-p
66 µsec
IC401 3, 4 REC
VSH
SHT 10 11 6
2.4 Vp-p
80 nsec
IC401 qs REC
RG
RG 12 14 3
H1
H1 13 15 2
H2
H2 14
16 1
2.0 Vp-p
36.818178MHz
80 nsec
IC401 qd, qf REC
05
FC-86 BOARD (1/4)
4.0 Vp-p
60 nsec
IC102 2-qa REC
IC102
4.6 Vp-p
S/H, AGC,
A/D CONVERTER
80 nsec
(SEE PAGE 4-11)
IC102 qh REC
D0 2
26 DIN ı
ı CA AD01-10
D9 11
CLPOB 20
IC103
TIMING GENERATOR
(SEE PAGE 4-11)
40 V1
41 V3
42 V2A
CLD 35 16 ADCLK
44 V2B
XCLPDM 15 23 CLPDM
XSHP 17 22 XSHP
XSHD 18 21 XSHD
PBLK 21 19 PBLK
STBY 18
PGACONT2 29
PGACONT1 30
45 VSUB
3/2MCK 23
HRI 33
FRI 34
9 RG
12 H1
13 H2 WEN 3
SSI 27
SSK 28
MCK 38
X101
48 OSCI
RST 25
SEN 29
47 OSCO DSGAT 37
950 mVp-p
36.818178 MHz
IC103 rj REC/PB
3-3
IC503
DRC
IC104
(SEE PAGE 4-13)
Y/C PROCESSOR
(SEE PAGE 4-12)
83 58
ı ı
DOY0 45 YIN0 YOUT0
87 62
ı ı ı
ı CA Y0-7
89 64
DOY7 38 YIN7 YOUT7
ı ı
91 66
97 AD9 DOC0 36 92 CIN0 COUT0 75
ı ı ı ı
ı ı CA C0-7 ı ı
88 AD0 DOC7 29 99 CIN7 COUT3 72
83 XCLPOB
V
IC601 rh REC/PB
MFRO 57 80 XVDI XHDO 56
MHRO 58 81 XHDI XVDO 57
CFRO 65 82 XVOC MCK 78
80 MCK132 XLCDH 55
82 HRO XCS 44
XRST 40
81 FRO
SI 45
XSCK 43
84 WWEI
13 SI XCLR 10
12 SCK XCE 11
85 MCKI
15 – 20
14 SO
DAT0
22 – 25
ı
MC D00-15
27 – 29
DAT15
31 – 33
3 – 5
ADR0
ı 7 – 12
MC A01-10
ADR9 100
XRAS 34
XUCAS 35
XLCAS 36
XWE 37
XOE 39
XBRQ 42
STRBON 53
DRBUSRQ 41
IC601
3.8 Vp-p
D/A CONVERTER
(SEE PAGE 4-15)
IC601 wd REC/PB
60 nsec
IC601 2-5, ej-rf REC/PB
IOR 23
37 Y0
ı
PANEL Y0-7 ı
44 Y7
IC601 ql REC/PB
5 C0
ı
PANEL C0-3 ı
2 C3
IOG 19
3.2 Vp-p 3.2 Vp-p
H
IC601 rg REC/PB
45 HD
IC601 qf REC/PB
46 VD
31 MCK
IOB 14
34 VCK
IC705
OSD
(SEE PAGE 4-24)
20 HSYNC VC0 18 48 CGB
H
19 VSYNC VC1 17 36 CGR
IC601 rj REC/PB
8 MCK VC2 16 32 CGG
BLKA 15 1 CGBLK
HDO 47
RESET 4 27 XRST
S IN 3 28 SI VREFR 21
SCLK 1 29 XSCK VREFG 17
CS 2 26 XCS VREFB 13
DATA BUS
ADDRESS BUS
XRST SYS
3-4
500 mVp-p
H
CN602
(1/3)
Q601
PANEL R
BUFFER 17
500 mVp-p
H
Q602
PANEL G
BUFFER 19
500 mVp-p
H
TO
PK-59 BOARD
Q603
1
(LCD BLOCK)
PANEL B
21
BUFFER
CN603
(SEE PAGE 3-11)
3.2 Vp-p
PANEL XHD
11
PANEL XVD
13
XLCDH
22
MC D00-15
MC A01-10
TO
FDD INTERFACE
2
BLOCK
XRAS
(SEE PAGE 3-7)
XCASH
XCASL
XWE
XOE
XBUS RQ
STRB ON
DR BUS RQ
XCS OSD
XHI SCK
HI SO
XRST SYS
XCS IDIC2
SYS V
TO
XRST CORE
MODE CONTROL
3
XCS IDIC
BLOCK
CAM SI
(SEE PAGE 3-9)
CAM SO
XCAM SCK
GCAM STBY
SHUTTER WE
TG CS
CAM DD ON
VREF PYRA
TO
AGC CONT2
LENS MOTOR
AGC CONT1
DRIVE
4
CAC VD BLOCK
(SEE PAGE 3-6)
MCK