Sony DSR-300P Service Manual page 47

MCD005AM-TLM (SANYO)
THREE-PHASE BRUSHLESS MOTOR DRIVER FOR 8 MM VCR CAPSTAN MOTOR
—TOP VIEW—
V 1 36 V
R OUT OUT OUT
2 NC NC 35
U 3 34 W
OUT OUT R OUT
U 4 33 W
R OUT OUT OUT
5 NC NC 32
6 GND Rf 31
7 V 1 Vs 30
CC
W 1 8 V 2 29
IN IN CC
W 2 9 V 1 28
IN IN CC
U 1 10 27 ST. BY
IN IN IN
U 2 11 26 FRC
IN IN IN
V 1 12 25 BR
IN IN IN
V 2 13 24 R
IN IN FIN IN
VH_ 14 23 R
IN FOUT OUT
15 NC 22 FG
OUT OUT
ANGLE 16 21 FGV
IN CC OUT
17 NC 20 FG _
IN IN
18 GND 19 FG +
IN IN
INPUT
ANGLE : GAIN SLOPE
BR : BRAKE CONTROL
FG _, FG + : FG SIGNAL
IN IN
FRC : FORWARD/REVERSE CONTROL
RF : RF VOLTAGE DETECT AMP
IN
ST. BY : MOTOR DRIVE MUTE
U 1, U 2 : U PHASE HALL ELEMENT
IN IN
V 1, V 2 : V PHASE HALL ELEMENT
IN IN
VH_ : HALL BIAS CURRENT
W 1, W 2 : W PHASE HALL ELEMENT
IN IN
30
V
S
AMPLITUBE LIMITED CIRCUIT
LEVEL SHIFT
MATRIX 180° 120°
DSR-300/P(J,E)/V2
10 3
U 1 U
IN OUT
11 4
U 2 U
IN R
12 36
V 1 V
IN OUT
13 1
V 2 V
IN R
8 33
W 1 W
IN OUT
9 34
W 2 W
IN R
16
ANGLE
25
BY
27
ST. BR
26
FRC
14
VH_
21
FGV
CC
20 22
FG _ FG
IN OUT
19
FG +
IN
24 23
RF RF
IN OUT
OUTPUT
FG : FG COMPARATOR
OUT
FGV : INTERNAL FG POWER
CC
RF : RF VOLTAGE DETECT AMP
OUT
U : U PHASE
OUT
: U PHASE ( 2 Z RESISTOR )
U
R
V : V PHASE
OUT
V : V PHASE ( 2 Z RESISTOR )
R
W : W PHASE
OUT
: W PHASE ( 2 Z RESISTOR )
W
R
_
23
R
FOUT
+
3 : 2
22
FG
OUT
19
FG _
IN
20
FG +
IN
21
FGV
CC
INPUT
FORWARD/REVERSE
SOURCE SINK
CONTROL F/RC
U V W
W V
1 1 1 0
V W
W U
2 1 0 0
U W
V W
3 0 0 1
W V
U V
4 0 1 0
V U
V U
5 1 0 1
U V
U W
6 0 1 1
W U
0 : LOW LEVEL
1 : HIGH LEVEL
MSM27C822ZB-NGS-K (OKI)
C-MOS 8 M-BIT ONE TIME PROM
—TOP VIEW—
11
A0
1 NC NC 44
10
A1
9
A18 2 NC 43
A2
8
A3
A17 3 42 A8
7
A4
6
A7 4 41 A9
A5
5
A6
A6 5 40 A10
4
A7
A5 6 39 A11
42
A8
41
A4 7 38 A12
A9
40
A10
A3 A13
8 37
39
A11
38
A2 9 36 A14
A12
37
A13
A1 10 35 A15
36
A14
A0 11 34 A16
35
A15
CE BYTE 34
12 33
A16
3
A17
13 GND GND 32
2
A18
OE
33
14 31 D15/A-1
BYTE
D0 15 30 D7
12
D8 16 29 D14
D1 17 28 D6
INPUT
A0 - A18
D9 18 27 D13
BYTE
D2 19 26 D5
CE
OE
D10 20 25 D12
D3 21 24 D4
OUTPUT
D11 22 V 23
DD
D0 - D14
INPUT/OUTPUT
D15/A-1
x 8/x 16 OUTPUT SELECTOR
33
BYTE
CE OE /V
PP
12 14 33
CE OE PGM
11
A0
10
A1
9
A2
MEMORY MATRIX
8
A3
(524,288 x 16)-BIT OR
7
A4
(1,048,576 x 8)-BIT
6
A5
5
A6
4
A7
42
A8
41
A9
40
A10
39
A11
38
A12
MULTIPLEXER
37
A13
36
A14
35
A15
34
A16
3
A17
2
A18
OUTPUT BUFFER
0
1
0
1
0
1
0
1
0
1
0
1
15
D0
17
D1
19
D2
21
D3
24
D4
26
D5
28
D6
30
D7
16
D8
18
D9
20
D10
22
D11
25
D12
27
D13
29
D14
31
D15/A-1
CE OE
14
: ADDRESS
: MODE SWITCH
: CHIP ENABLE
: OUTPUT ENABLE
: DATA
: DATA OUTPUT/ADDRESS INPUT
9-39
IC