Sony DSR-300P Service Manual page 30

IC
CXD8384Q (SONY)
C-MOS LTC READER/GENERATOR
—TOP VIEW—
81
82
83
84
85
86
87
88
89
90 GND
91
92
93
94
95
96
97
98
99
100
PIN PIN
I/O SIGNAL I/O
No. No.
1 I/O D2 26 I
2 I/O D3 27 I
3 — V 28 —
DD
4 — GND 29 —
O
5 I/O D4 30
6 I/O D5 31 O
7 I/O D6 32 O
8 I/O D7 33 O
CS
9 I 34 O
WR
10 I 35 I
RD
11 I 36 I
I 37
12 A0 I
13 I A1 38 O
14 I A2 39 I
15 — GND 40 —
16 I A3 41 O
17 I A4 42 I
18 I A5 43 I
19 O X1BE 44
I
20 I X1TC 45 O
21 O REC 46 O
22 O OUT 47 O
23 O READ 48 O
24 I PBTC 49 I
25 I LTCI 50 O
9-22
PIN PIN
SIGNAL I/O SIGNAL I/O
No. No.
CTLI 51 I FRMI 76 O
FWD 52 I LSHI 77 O
V 53 — V 78 —
DD DD
GND 54 — GND 79 —
O
RSYC 55 O LSHO 80
LREV 56 O VCEO 81 O
DCLK 57 I VCI1 82 O
DATA 58 I VCI2 83 I
BER 59 O LTCO 84 I
DMCK 60 O CFNG 85 I
DEMI 61 I REF 86 I
XOUT
62 O 87
K16I I
XBK
63 O PORT 88 O
BKIN
64 I NORM 89 I
GND 65 — GND 90 —
BKO 66 O NT4F 91 O
CSHD 67 O PL4F 92 O
CSVD 68 O PL8F 93 I
HDI 69 O PM8F 94 I
HDO 70 I TEST11 95 I
VDO 71 I/O LRRV 96 I
XINT
IFRM 72 O 97 I
XRES
FRAM 73 I 98 I
BKUP
DLYI 74 I 99 I/O
DLYO 75 O INTM 100 I/O
12 66
A0 NT4F
13 67
A1 PL4F
14 68
50 A2 PL8F
16 69
49 A3 PM8F
17
48 A4
18 99
47 A5 D0
9 100
46 CS D1
10 1
45 WR D2
11 2
RD D3
44
5
43 D4
42 6
42 CSHD D5
43 7
41 CSVD D6
8
GND 40 D7
39
71 30
LRRV RSYC
38
27 31
FWD LREV
37
26 32
36 CTLI DCLK
24 33
35 PBTC DATA
25 34
34 LTCI BER
20
33 X1TC
19
X1BE
32
72 21
XINIT REC
31
73 22
XRES OUT
74 23
BKUP READ
87
ALCK
38
XBK
37 45
K16I HDO
44 46
HDI VDO
49 47
DLYI IFRM
51 48
FRMI FRAM
52 50
SIGNAL
LSHI DLYO
57 55
VCI1 LSHO
INTG
58 56
VCI2 VCEO
INTL
61 59
REF LTCO
V
DD
60
CFNG
GND
35
DMCK
INTC
36 76
DEMI INTG
INTR
39 77
BKIN INTL
INTX
89 80
CK1I INTC
TEST1
93 81
INTE INTR
TEST2
83 82
TEST1 INTX
TEST3
84
TEST2
TEST4
85 88
TEST3 CK2M
ALCK
86
41
TEST4 BKO
CK2M
94 91
TEST5 CK1O
CK1I
95 92
TEST6 DCCK
GND
96 75
TEST7 INTM
CK1O
97 62
TEST8 XOUT
DCCK
98 63
TEST9 PORT
INTE
64 72
NORM XINT
TEST5
70
TEST11
TEST6
TEST7
TEST8
TEST9
D0
D1
INPUT
A0 - A5 ; ADDRESS BUS IN
ALCK ; ARITHMETIC LOGIC UNIT CLOCK IN
BKIN ; BACKUP IN (NEGATIVE LOGIC)
BKUP ; BACKUP EXECUTION IN (NEGATIVE LOGIC)
CK1I ; SYSTEM CLOCK IN
CSHD ; COMPOSITE SYNC/HD IN
CSVD ; COMPOSITE SYNC/VD IN
CTLI ; CTL SIGNAL IN
DEMI ; LONGITUDINAL TIME AND CONTROL CODE IN
DLYI ; INPUT TO DELAY CIRCUIT
DMCK ; LTC DEMODULATE CLOCK IN
FRMI ; FRAME SIGNAL IN
FWD ; CTL DIRECTION SIGNAL IN
HDI ; HORIZONTAL SYNC INPUT
INTE ; EXTERNAL INTERRUPT IN (POSITIVE LOGIC)
K16I ; 16KHz CLOCK IN
BACKUP CLOCK IN
LRRV ; DIRECTION INPUT FOR LTC READER CALCULATION
LTCI ; GENERATED LTC IN
LSHI ; LTC SYNCHRINOUS H INPUT
NORM ; NORMAL/BACKUP MODE SELECT
TEST1 - TEST9 ; TEST IN
TEST11
PBTC ; PLAYBACK LTC IN
RD ; READ IN (NEGATIVE LOGIC)
; REFERENCE OF LTC GENERATOR
REF
VCI1 ; LTC CLOCK IN-1
VCI2 ; EXTERNAL LTC IN
X1TC ; LTC CLOCK IN-2
XRES ; SYSTEM RESET IN (NEGATIVE LOGIC)
WR ; WRITE IN (NEGATIVE LOGIC)
OUTPUT
BER ; BI-PHASE MARK ERROR (BIT ERROR)
BKO ; BACKUP CONTROL OUT-2 (POSITIVE LOGIC)
CFNG ; COLOR FRAME ERROR FLAG OUT
CK1O ; SYSTEM CLOCK OUT
CK2M ; CLOCK 2M OUT
CS ; CHIP SELECT IN (NEGATIVE LOGIC)
D0 - D7 ; DATA BUS
DATA ; DEMODULATED SERIAL DATA OUT
DCCK ; LTC DECODE CLOCK OUT
DCLK ; DEMODULATED CLOCK OUT
DLYO ; OUTPUT FROM DELAY CIRCUIT
FRAM ; FRAME SIGNAL OUT -2
; HORIZONTAL SYNC DRIVE OUT
HDO
IFRM ; FRAME SIGNAL OUT -1
INTC ; CTL INTERRUPT OUT (POSITIVE LOGIC)
INTG ; GENERATOR INTERRUPT OUT (POSITIVE LOGIC)
INTL ; READER INTERRUPT -1 OUT (POSITIVE LOGIC)
INTM ; INTERRUPT MIX OUT (POSITIVE LOGIC)
INTR ; READER INTERRUPT -2 OUT (POSITIVE LOGIC)
INTX ; EXTERNAL LTC INTERRUPT OUT (POSITIVE LOGIC)
LREV ; READ REV/FWD BIT OUT
LSHO ; LTC SYNCHRONOUS SIGNAL H OUT
LTCO ; LTC SIGNAL OUT
NT4F, PL4F, ; DEMODULATED COLOR FRAME OUT
PL8F, PM8F
OUT ; EXTERNAL OUTPUT LTC OUT
PORT ; PORT
READ ; READ LTC OUT
REC ; RECORD LTC OUT
RSYC ; READ SYNC WORD DATA OUT
VCEO ; LTC CLOCK OUT
VDO ; VERTICAL SYNC DRIVE OUT
; BI-PHASE MARK ERROR (NORMAL SPEED READER)
X1BE
XBK ; BACKUP CONTROL OUT-1 (NEGATIVE LOGIC)
XINT ; INVERTED INTERRUPT MIX OUT (NEGATIVE LOGIC)
XOUT ; INVERTED EXTERNAL OUTPUT LTC OUT
DSR-300/P(J,E)/V2