Sony DSR-300P Service Manual page 36

IC
CXD8627AR (SONY)
C-MOS VIDEO AUXILIARY DATA READ/WRITE
—TOP VIEW—
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
PIN PIN
I/O SIGNAL I/O
NO. NO.
1 I TST-CTL1 26 —
2 I TST-CTL2 27
3 I TST-CTL3 28 —
4 I TST-CTL4 29 —
5 — V 30
DD
6 — GND 31 I/O
7 I 8-B COM 32 I/O
8 — V 33 I/O
DD
9 — GND 34 I/O
RST
10 I 35 I/O
11 I SCK 36 I/O
12 O S-DATA OUT 37 I/O
13 I S-DATA IN 38 I/O
14 I CS 39 —
15 — V 40 —
DD
16 I THRU/NORM SEL 41 I/O
17 O AUX-IOEC 42 I/O
18 I IND EN 43 I/O
19 I VI-EN 44 I/O
20 — GND 45 I/O
21 I AU-DATA 46 I/O
22 I AU-START 47 I/O
23 I AU-DATA EN 48 I/O
24 O AUX-START 49
25 I P-SAVE 50 —
INPUT
8-B COM : H : 8-BYTE COM, L : NORMAL
ADV0, ADV1 : OUTPUT TIMING ADVANCE CONTROL
AU-DATA : AUDIO SERIAL DATA
AU-DATA EN : AUDIO SERIAL DATA ENABLE
AU-START : AUDIO START
BUPFS : FDF DATA TIMING
CK : MAIN CLOCK (18.1MHz)
CS : CHIP SELECT
FLD-PLS : FIELD REFERENCE PULSE
IND EN : INDI AUDIO ENABLE
P-SAVE : POWER SAVE (H : POWER SAVE)
R/P SEL : REC/PB SEL (H : REC, L : PB)
RST
: SYSTEM RESET
SCK : SERIAL COMMUNICATION CLOCK
S-DATA IN : SERIAL COMMUNICATION DATA
SYS SEL : SYSTEM SELECT (H : PAL, L : NTSC)
THRU/NORM SEL : THROUGH/NORMAL SELECT (H : THROUGH, L : NORMAL)
TRK-PLS : TRACK REFERENCE PULSE
TST-AA0 - TST-AA7 : FOR TEST
TST-AB - TST-AB7 : FOR TEST
TST-CTL1 - TST-CTL4 : FOR TEST
TST-D0 - TST-D7 : FOR TEST
VI-EN : VIDEO ENABLE
OUTPUT
AUX-IOEC : I/O ENABLE CONTROL
AUX-START : AUXILIARY START
MODE0 - MODE3 : MODE COMMAND
PERI CNT0 - PERI CNT3 : PERIPHERAL IC CONTROL COMMAND
S-DATA OUT : SERIAL COMMUNICATION DATA
TST-O0 - TST-O7 : FOR TEST
INPUT/OUTPUT
SFDT15 - SFDT0 : SYF/FDF DATA BUS
9-28
V 50
DD
49
48
47
46
45
44
43
42
41
GND 40
V 39
DD
38
37
36
35
34
33
32
31
30
V 29
DD
GND 28
27
GND 26
PIN PIN
SIGNAL I/O SIGNAL I/O
NO. NO.
GND 51 — GND 76 I
I CK 52 I R/P SEL 77 I
GND 53 I ADV0 78 I
V 54 I ADV1 79 I
DD
I SYS SEL 55 — V 80 I
DD
SFDT15 56 I TRK-PLS 81 I
SFDT14 57 I FLD-PLS 82 I
SFDT13 58 — GND 83 I
SFDT12 59 O PERI CNT0 84 I
SFDT11 60 O PERI CNT1 85 I
SFDT10 61 O PERI CNT2 86 I
SFDT9 62 O PERI CNT3 87 I
SFDT8 63 O MODE0 88 I
V 64 O MODE1 89 I
DD
GND 65 O MODE2 90 I
SFDT7 66 O MODE3 91 I
SFDT6 67 — V 92 I
DD
SFDT5 68 — GND 93 O
SFDT4 69 I TST-AA0 94 O
SFDT3 70 I TST-AA1 95 O
SFDT2 71 I TST-AA2 96 O
SFDT1 72 I TST-AA3 97 O
SFDT0 73 I TST-AA4 98 O
I BUPFS 74 I TST-AA5 99 O
V 75 I TST-AA6 100 O
DD
CXD8630R (SONY)
C-MOS VIDEO LOCK (DIGITAL AUDIO)
—TOP VIEW—
49 NC
50 GND
51
52 GND
53
54 GND
55
56
57
58 GND
59
60 GND
61
62 GND
V
DD
63 NC
GND
64
PIN
I/O SIGNAL
NO.
1 — GND
2 — GND
3 O DV32
4 O PVRI
5 O PRFI
6 O PRST
7 O PCEZ
8 — V
DD
SIGNAL
9 — NC
TST-AA7
10 — V
DD
TST-AB0
11 I CORE THROUGH
TST-AB1
12 I SCK
TST-AB2
13 O SDO
TST-AB3
14 I SDI
TST-AB4
15 I CS
TST-AB5
16 O QSCK
TST-AB6
TST-AB7
TST-D0
TST-D1
TST-D2
TST-D3
TST-D4
28
TST-D5
NOR XERST
37
TST-D6
PARITY
1/2
TST-D7
34
TST-O0
ADDR RESET 1/108
TST-O1
35
OSDI FRM PUL
TST-O2
TST-O3
55
MOE48K NOR
TST-O4
41
PAL NTSC
TST-O5
TST-O6
25
FLTT
TST-O7
53
CK13 5MHZ
26
CORE XINT
51
H12K L24K
27
CORE DV32
30
CORE PRST
29
CORE PCEZ
48
SERIAL1
40
CAM EDITOR
AF SIZE LATCH
31
CORE LRCK
COUNT
23
WIDE CONT.
FLTA
24
FLTA SIZE
GND
V 32
DD
31
30
29
28
27
26
25
24
23
22
21
20
19
GND 18
17
PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO.
17 I QSDI SERIAL 33 — GND
18 — GND 34 O ADDR RESET
19 O JOG CS 35 I QSDI FRM PUL
20 O JOG SCK 36 O DE EMPH
21 O JOG SDO 37 I PARITY
22 I CORE BCK 38 O SERIAL ERR
23 I FLTA 39 — GND
24 O FLTA SIZE 40 I CAM EDITOR
25 I FLTT 41 I PAL NTSC
26 I CORE XINT 42 — NC
27 I CORE DV32 43 — V
DD
28 I NOR XERST 44 — NC
29 I CORE PCEZ 45 I PCEZ0
30 I CORE PRST 46 I PCEZ1
31 I CORE LRCK 47 — NC
32 — V 48 O SERIAL1
DD
BCK
TABLE CONV.
1/64 SERIAL DATA IN
ERR SER CONT.
AF SIZE
COUNT
1125
562.5
PULSE LOCK/UNLOCK
2048
1024
Fs 32 K
V
CC
Fs CHANGE
0.5/1.0/1.5/2.0
00 01 10 11
REC
SETIAL DATA OUT
PIN
I/O SIGNAL
NO.
49 — NC
50 — GND
51 I H12K L24K
52 — GND
53 I CK13 5MHZ
54 — GND
55 I MODE48K NOR
56 O BCK
57 O LRCK
58 — GND
59 I A128
60 — GND
61 I V512
62 — GND
63 — NC
64 — V
DD
59
A128
17
QSDI SERIAL
38
SERIAL ERR
4
PVRI
5
PRFI
61
V512
3
DV32
6
PRST
7
PCEZ
11
CORE THROUGH
45
PCEZ0
46
PCEZ1
36
DE EMPH
DSR-300/P(J,E)/V2