Diagnosis; Power On Sequence - Pioneer DJM-2000 Service Manual

1

5. DIAGNOSIS

5.1 POWER ON SEQUENCE

A
Canceling power-on reset
TUSB Microcomputer A
3200 (NEC78K0R)
PCON
Waiting 500 msec until
power supply stabilizes
B
DIMMER output
Canceling reset
Canceling reset
C
D
E
USB_SBY "L"
USB
initialization
F
22
1
2
Microcomputer C
Microcomputer B
(SH7764)
Muting by setting Pin 73 to H.
Resetting microcomputers SH and B by setting Pin 29 to L.
Resetting SRC (for DSP) by setting Pin 81 to L.
Resetting SRC (for USB) by setting Pin 82 to L.
Resetting USB by setting Pin 39 to L.
Starting supplying power to the peripheral ICs by setting Pin 72 to H.
DIMMER output from Pin 75
Canceling USB reset by setting Pin 39 to H.
Canceling reset of microcomputers SH and B by
setting Pin 29 to H.
InitProgram transfer
to SDRAM
Canceling reset
A17: L
V19: H
Y15: L
Configuration
A17: H
V19: H
Y15: L
A17: L
V19: L
Y15: H
Canceling reset
Canceling SubIC reset
Canceling reset of Ethernet
CTRL of
microcomputer A
Handshake
Handshake
Informing of operation mode
Program transfer
to SDRAM
Informing of initial
settings
Starting tasks
Informing of startup
completion
Canceling reset of Touch-Panel IC
Canceling reset
of SRC
Canceling reset
of SRC
Reception of acknowledgement of USB startup completion, by setting Pin 40 to L.
After USB initial settings are completed,
USB data input to Pin 42 (I) and
USB data output from Pin 43 (O) start.
A
2
3
DSP1 DSP2
Resetting SRC (CH1) by setting Pin E3 to L.
Resetting SRC (CH2) by setting Pin F4 to L.
Resetting SRC (CH3) by setting Pin F3 to L.
Resetting SRC (CH4) by setting Pin G4 to L.
Resetting SRC (DSP) by setting Pin T4 to L.
Resetting SUB IC by setting Pin R1 to L.
Resetting DSP flash memory by setting Pin T3 to L.
Resetting DSP2 by setting Pin T2 to L.
Resetting DSP1 by setting Pin T1 to L.
Inhibiting access to DPRAM by setting Pin M42 to L.
Resetting Touch Panel IC by setting Pin P4 to L.
A17: L (port for checking the startup sequence)
V19: L (port for checking the startup sequence)
Y15: L (port for checking the startup sequence)
Canceling reset of DSP flash memory by setting Pin T3 to H.
Canceling reset of DSP2 by setting Pin T2 to H.
Canceling reset of DSP1 by setting Pin T1 to H.
Serial clock output from Pin AA1.
Serial data output from Pin Y1.
Reception of acknowledgement of configuration
completion, by setting Pin V1 to H.
Stabilizing BUS CLOCK by setting Pin A18 to L.
BUS CLOCK stabilizes.
Canceling reset of FPGA by setting Pin U2 to H.
Handshake
Canceling reset of SUB IC by setting Pin R1 to H.
Canceling reset of Ethernet IC by setting Pin R2 to H.
Permitting access to DPRAM by setting Pin M42 to H.
Canceling reset of Touch-Panel IC by setting Pin P4 from H to L.
Canceling reset of SRC (CH1) by setting Pin E3 to H.
Canceling reset of SRC (CH2) by setting Pin F4 to H.
Canceling reset of SRC (CH3) by setting Pin F3 to H.
Canceling reset of SRC (CH4) by setting Pin G4 to H.
DJM-2000
3
4
Port
FPGA
Process
Status of the port for checking the
startup sequence
The printing on the board signifies that
on the probe pad. See the PCB
Diagram of the MAIN ASSY.
The printing is located near IC1601 on
the IC-mounted surface.
SH
A17 pin
Pin No.
Printing
on the PF5
board
Inconstancy Inconstancy
LOW(0 V) LOW(0 V)
LOW(0 V)
FPGA_DONE
HI(3.3 V)
LOW(0 V) LOW(0 V)
4
V19 pin Y15 pin
PB7 PH3
Inconstancy
LOW(0 V)
HI(3.3 V) LOW(0 V)
HI(3.3 V) LOW(0 V)
HI(3.3 V)