Aaeon ACP-1104 User Manual
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Aaeon ACP-1104 User Manual

10.1” multi-touch panel pc intel celeron processors rs-232/422/485 usb 3.0, mini card, hdmi
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M u l t i - T o u c h P a n e l P C
A C P - 1 1 0 4
ACP-1104
10.1" Multi-Touch Panel PC
®
Intel
Celeron® Processors
RS-232/422/485
USB 3.0, MiniCard, HDMI
st
ACP-1104 Manual 1
Ed
May 26, 2015

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Summary of Contents for Aaeon ACP-1104

  • Page 1 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ACP-1104 10.1” Multi-Touch Panel PC ® Intel Celeron® Processors RS-232/422/485 USB 3.0, MiniCard, HDMI ACP-1104 Manual 1 May 26, 2015...

  • Page 2: Copyright Notice

    AAEON, assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Acknowledgments ® ®  Intel , Atom are registered trademarks of Intel Corporation. ® ®...

  • Page 4: Packing List

    A C P - 1 1 0 4 Packing List Before you begin installing your Panel PC, please make sure that the following items have been shipped:  ACP-1104 Multi-Touch Panel PC  RJ-45 COM Port Cable x 2  Power Adapter x 1 ...
  • Page 5 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Safety & Warranty Please read the following safety instructions carefully. It is advised that you keep this manual for future references Disconnect this device from any AC supply before cleaning.
  • Page 6 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded devices.
  • Page 7 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 temperature of Intel Core i7 is 40°C, the frequency of the CPU will be between 1.8~1.3 GHz. This device complies with Part 15 FCC Rules.
  • Page 8 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Classification 1. Degree of production against electric shock: not classified 2. Degree of protection against the ingress of water: IPX1 3.
  • Page 9 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Safety Symbol Description The following safety symbols are further explanations for your reference. Attention, consult ACCOMPANYING DOCUMENTS.
  • Page 10 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 China RoHS Requirements 产品中有毒有害物质或元素名称及含量 AAEON Panel PC/ Workstation 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬...

  • Page 11: Table Of Contents

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Contents Chapter 1 General Information 1.1 Introduction ..............1-2 1.2 Features ..............1-3 1.3 Specification .............. 1-4 Chapter 2 Hardware Installation 2.1 Safety Precautions ............
  • Page 12 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.16 COM1 RS-232/422/485 Connector (CN17) .... 2-12 2.17 Dry and Wet Contact Digital Input (CN23) ....2-13 2.18 Dry and Wet Contact Digital Output (CN24) ...
  • Page 13 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 B.2 Memory Address Map .......... B-4 B.3 IRQ Mapping Chart ..........B-5 Appendix C Electrical Specifications for I/O Ports C.1 Electrical Specifications for I/O Ports ....

  • Page 14: Chapter 1 General Information

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Chapter General Information Chapter 1 General Information...

  • Page 15: Introduction

    User may refer to the AAEON.com for the latest version of this document. Chapter 1 General Information...

  • Page 16: Features

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 1.2 Features  10.1” Multi-Touch screen  Aluminum Design  7H Two-point Multi-Touch Display ®...

  • Page 17: Specification

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 1.3 Specification System ®  Processor Intel Atom™ J1900/N2807 Processor  System Memory 204-pin DDR3L 1333 SODIMM x 1, Up to 8 GB (Pre-installed 2 GB) ...
  • Page 18 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ® Windows 7 32/64-bit Linux by Fedora kernel 2.6.3 up Mechanical  Construction IP65/ NEMA4-rated Aluminum Front Bezel ...
  • Page 19 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4  Display Type 10.1”, WXGA, LED  Max. Resolution 1280 x 800  Max. Colors 262 K ...

  • Page 20: Chapter 2 Hardware Installation

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Chapter Hardware Installation Chapter 2 Hardware Installation...

  • Page 21: Safety Precautions

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.1 Safety Precautions Always completely disconnect the power cord from your board whenever you are working on it.

  • Page 22: Mechanical Drawings

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.2 Mechanical Drawings Front Chapter 2 Hardware Installation...
  • Page 23 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Back Chapter 2 Hardware Installation...

  • Page 24: List Of Jumpers

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.3 List of Jumpers The board has a number of jumpers that allow you to configure your system to suit your application.

  • Page 25: List Of Connectors

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.4 List of Connectors The board has a number of connectors that allow you to configure your system to suit your application.

  • Page 26: At/Atx Mode Selection (Jp1)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.5 AT/ATX Mode Selection (JP1) 1 2 3 1 2 3 ATX Mode (Default) AT Mode Function ATX Mode (Default)

  • Page 27: Lvds Bklt Power Selection (Jp4)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.8 LVDS BKLT Power Selection (JP4) 1 2 3 1 2 3 5V (Default) Function 5V (Default) 2.9 Clear CMOS Jumper (JP5)

  • Page 28: Dry And Wet Contact Digital Output Power Selection

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Dry Contact Digital Input (Default) 2.11 Dry and Wet Contact Digital Output Power Selection (JP7) 1 2 3 1 2 3 Wet Contact Digital Output...

  • Page 29: Usb 3.0 Connector (Cn2)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 HDMI_TX0- DIFF HDMI_CLK+ DIFF HDMI_CLK- DIFF HDMI_DDC_CLK HDMI_DDC_DATA HDMI_PWR HDMI_HPD 2.13 USB 3.0 Connector (CN2) Pin Name Signal Type Signal Level...

  • Page 30: Com2 Rs-232/422/485 Connector (Cn4)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.14 COM2 RS-232/422/485 Connector (CN4) RS-232 RS-422 RS-485 DATA+ DATA- 2.15 COM3 RS-232 I/F (CN16) RS-232 2-11 Chapter 2 Hardware Installation...

  • Page 31: Com1 Rs-232/422/485 Connector (Cn17)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.16 COM1 RS-232/422/485 Connector (CN17) RS-232 RS-422 RS-485 DATA+ DATA- 2-12 Chapter 2 Hardware Installation...

  • Page 32: Dry And Wet Contact Digital Input (Cn23)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.17 Dry and Wet Contact Digital Input (CN23) 2-13 Chapter 2 Hardware Installation...
  • Page 33 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Dry Contact Wiring Wet Contact Wiring *Digital input voltage range: Max: 10 ~ 25V Min: 5V Pin Name Signal Type...

  • Page 34: Dry And Wet Contact Digital Output (Cn24)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Digital input 2 Input DRY (5V) WET (3~30V) Digital input 1 Input DRY (5V) WET (3~30V) Digital input 0 Input...

  • Page 35: Ethernet Port (Cn26)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Digital output 4 Input Open collector to 30 Digital output POWER Input 3 ~ 30 V 2.19 RJ-45 Ethernet Port (CN26) Pin Name Signal Type...

  • Page 36: Usb 2.0 Port 1 Connector (Usb1)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1-...

  • Page 37: Usb 2.0 Port 3 Connector (Usb3)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.23 USB 2.0 Port 3 Connector (USB3) Pin Name Signal Type Signal Level USB_D- DIFF USB_D+ DIFF...
  • Page 38 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 mSATA RX+ DIFF +3.3V +3.3V mSATA RX- DIFF +1.5V +1.5V SMB_CLK +3.3V mSATA_TX DIFF SMB_DATA +3.3V mSATA_TX+...

  • Page 39: Pci-E Full Size Minicard Slot (Pcie2)

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 +3.3V +3.3V +3.3V +3.3V +1.5V +1.5V +3.3V +3.3V 2.26 PCI-E Full Size MiniCard Slot (PCIE2) Pin Name Signal Type Signal Level...
  • Page 40 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 +1.5V +1.5V PCIE RX- DIFF +3.3V +3.3V PCIE RX+ DIFF +1.5V +1.5V 2-21 Chapter 2 Hardware Installation...
  • Page 41 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 SMB_CLK +3.3V PCIE TX DIFF SMB_DATA PCIE TX+ DIFF +3.3V +3.3V +3.3V +3.3V +1.5V +1.5V +3.3V +3.3V...

  • Page 42: Com-To-Rj-45 Converter Cable

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.27 COM-to-RJ-45 Converter Cable (For COM1 & COM2) RS-232 RS-422 RS-485 DATA- DATA+ 2-23 Chapter 2 Hardware Installation...

  • Page 43: Mounting The Panel

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2.28 Mounting the Panel Step 1: Get the wallmount brackets and sponge ready. Sponge Wall mount bracket Step 2: Remove the six screws (three on each side) at the back and place the wallmount brackets onto the panel.
  • Page 44 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Step 4: Insert the display to the surface (opening) where you are going to mount the panel Opening wall...

  • Page 45: Chapter 3 Ami Bios Setup

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Chapter BIOS Setup Chapter 3 AMI BIOS Setup 3-1...

  • Page 46: System Test And Initialization

    3. The system configuration is reset by Clear-CMOS jumper 4. The CMOS memory has lost power and the configuration information has been erased. The ACP-1104 CMOS memory has an integral lithium battery backup for data retention. However, you will need to replace the complete unit when it depletes.

  • Page 47: Ami Bios Setup

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 3.2 AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration.

  • Page 48: Setup Menu

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Setup Menu Setup submenu: Main Chapter 3 AMI BIOS Setup 3-4...
  • Page 49 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Setup submenu: Advanced Chapter 3 AMI BIOS Setup 3-5...

  • Page 50: Cpu Configuration

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 CPU Configuration Options summary: Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default EIST Disabled Enabled Optimal Default, Failsafe Default...
  • Page 51 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 IDE Configuration (IDE) Options summary: SATA Mode IDE Mode AHCI Mode Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-7...

  • Page 52: Usb Configuration

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support.
  • Page 53 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Hardware Monitor Chapter 3 AMI BIOS Setup 3-9...
  • Page 54 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Dynamic Digital IO Options summary: GPO0 Direction [Output] Output Level Optimal Default, Failsafe Default GPO1 Direction [Output] Output Level Optimal Default, Failsafe Default...

  • Page 55: Power Management

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode.
  • Page 56 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 SIO Configuration Chapter 3 AMI BIOS Setup 3-12...
  • Page 57 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Serial Port 1 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings...
  • Page 58 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Serial Port 2 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings...
  • Page 59 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Serial Port 3 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible:...
  • Page 60 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Setup submenu: Chipset Chapter 3 AMI BIOS Setup 3-16...
  • Page 61 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 North Bridge Chapter 3 AMI BIOS Setup 3-17...
  • Page 62 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Display Control Configuration Options summary: DVMT Pre-Allocated Optimal Default, Failsafe Default 128M 160M 192M 224M 256M 288M...
  • Page 63 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 South Bridge Options summary: Audio Controller Disabled Enabled Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-19...
  • Page 64 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Security Change User/Supervisor Password You can install a Supervisor password, and if you install a supervisor password, you can then install a user password.
  • Page 65 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Default En/Disable showing boot logo. Option ROM Messages Force BIOS Default...
  • Page 66 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 BBS Priorities Chapter 3 AMI BIOS Setup 3-22...
  • Page 67 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Setup submenu: Exit Chapter 3 AMI BIOS Setup 3-23...

  • Page 68: Chapter 4 Driver Installation

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Chapter Driver Installation Chapter 4 Driver Installation...
  • Page 69 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 The ACP-1104 comes with a driver disk that contains all drivers and utilities that can help you setup your product.
  • Page 70 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 4.1 Installation Insert the ACP-1104 driver disk into the disk drive. And install the drivers from Step 1 to Step 6 in order. Step 1 – Install Chipset Driver 1.
  • Page 71 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 2. Follow the instructions 3. Drivers will be installed automatically ® Step 5 – Install Intel Sideband Fabric Device Driver (Windows only) Open the Step 5 - Intel Sideband Fabric Device followed by the Setup.exe file...

  • Page 72: Appendix A Programming The Watchdog Timer

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Appendix Programming the Watchdog Timer Appendix A Programming the Watchdog Timer...

  • Page 73: Watchdog Timer Initial Program

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index...
  • Page 74 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 75 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute).
  • Page 76 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting...
  • Page 77 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07);...

  • Page 78: Appendix B I/O Information

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Appendix I/O Information Appendix B I/O Information...

  • Page 79: I/O Address Map

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 B.1 I/O Address Map Appendix B I/O Information...
  • Page 80 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Appendix B I/O Information...

  • Page 81: Memory Address Map

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 B.2 Memory Address Map Appendix B I/O Information...

  • Page 82: Irq Mapping Chart

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 B.3 IRQ Mapping Chart Appendix B I/O Information...
  • Page 83 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Appendix B I/O Information...
  • Page 84 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Appendix B I/O Information...
  • Page 85 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Appendix B I/O Information...

  • Page 86: Appendix C Electrical Specifications For I/O Ports

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 Appendix Electrical Specifications for I/O Ports Appendix C Electrical Specifications for I/O Ports...

  • Page 87: C.1 Electrical Specifications For I/O Ports

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 C.1 Electrical Specifications for I/O Ports Reference Signal Name Rate Output Backlight Brightness +5V/0.5 or CN19 +VCC_LVDS_BKLT Control...

  • Page 88: Dio Programming

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 C.2 DIO Programming ACP-1104 utilizes FINTEK 81866 chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial watchdog timer program is also attached based on which you can develop customized program to fit your application.

  • Page 89: Digital I/O Register

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 C.3 Digital I/O Register Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E...

  • Page 90: Digital I/O Sample Program

    M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 C.4 Digital I/O Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 91 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ // Digital Output control relative definition (Please reference to Table 3) #define byte DOutput1LDN // This parameter is represented from Note21 #define byte DOutput1Reg // This parameter is represented from Note22 #define byte DOutput1Bit // This parameter is represented from Note23 #define byte DOutput1Val // This parameter is represented from Note24...
  • Page 92 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low...
  • Page 93 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ AaeonReadPinStatus(byte LDN, byte Register, byte BitNum) Boolean Boolean PinStatus ; PinStatus = SIOBitRead(LDN, Register, BitNum); Return PinStatus ;...
  • Page 94 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07);...
  • Page 95 M u l t i - T o u c h P a n e l P C A C P - 1 1 0 4 ************************************************************************************ SIOBitRead(byte LDN, byte Register, byte BitNum) Boolean Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData);...

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