Addi-Data PC104-PLUS1500 Technical Description page 6

Digital i/o board, optically isolated
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Contents
Figures
F ig. 3-1: Correct handling................................................................
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F ig. 4-1: Physical set-up ...................................................................
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F ig. 4-2: Component scheme (top layer)........................................
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F ig. 4-3: Component scheme (bottom) ..........................................
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F ig. 5-1: Setting the turn switch ........................................................
4 H
F ig. 5-2: Connector with PCI-/ISA signals ..........................................
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F ig. 5-3: Fastening the board ..........................................................
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F ig. 6-1: New inserted board ...........................................................
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F ig. 6-2: ADDevice Manager ...........................................................
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PX 9000 ..........................................................................
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PX 8500 ..........................................................................
F ig. 7-3: 40-pin header....................................................................
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connector.......................................................................
F ig.8-1: Block diagram of the PC104-PLUS1500 ..............................
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F ig. 8-2: Digital input level................................................................
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F ig. 8-3: Digital output level .............................................................
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F ig.8-5: Upwards counter.................................................................
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F ig. 8-6: Downwards counter ...........................................................
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Tables
T able 4-1: Power loss .......................................................................
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T able 5-1: Position of the turn switch ................................................
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T able 8-1: OR logic..........................................................................
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T able 8-2: Mode register - Complete overview...............................
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T able 8-3: Mode register - partial overview .....................................
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T able 8-4: Principle of the OR logic .................................................
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T able 10-1: Glossary ........................................................................
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