Summary Of Operation Timings - Honeywell IS4921 Integration Manual

Area imaging decode engine
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Summary of Operation Timings

Parameter
Tprw_up
Tprw_up_ttl
Tdec_idle
Tdec_sleep
Trig_min
Trig_wake_min_pu
Notes:
1. Timing is the same for Both TTL or USB version
2. Processor is in Idle Mode when nTrig signal is received
3. Processor is in Sleep Mode when nTrig signal is received
4. Typical time specified may vary depending on the enumeration time of the USB host.
5. Typical times specified are valid for an IS4920 or an IS4921 with a firmware version of 15848 or
higher. Units with a firmware version lower than 15848 may require up to 3 seconds of an additional
time.
28
Operation Timing Specifications
Description
Power Applied to Processor Ready Delay (USB)
Trigger or Wake Low to Processor Ready Delay (TTL) 5 seconds
Trigger Low to Decode complete Delay
Trigger Low to Decode complete Delay
Minimum Duration of Trigger Signal
Minimum Activation Time for Trigger or
Wake Signal to Power Up TTL Unit
Typical
Relevant Note(s)
6 seconds
Notes 4 and 5
Note 4
90 msec
Notes 1 and 2
120 msec
Notes 1 and 3
20 msec
2 seconds

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