ZiLOG Z8 Technical Manual page 84

XOR
Logical Exclusive OR
XOR dst,src
Instruction fOI'llat:
OPC
OPC
OPC
Operation:
Flags:
EXBlllple:
Note:
5-50
OPC Address Mode
Cycles
(Hex)
dat
arc
6 B2
r r
6 B3
r
Ir
I
I
dst arc
dst 10 B4 R R
10 85 R IR
I I
src
I I
10 86 R 1M
10 B7 IR
1M
I
I
dst
I
I
src
dst
<--
dst XOR src
The source operand is logically EXCLUSIVE ORed with the destination operand and the
result stored in the destination. The EXCLUSIVE OR operation results in a one bit
being stored whenever the corresponding bits in the operands are different;
otherwise, a 0 bit is stored.
c:
Unaffected
Z: Set if the result is zero; cleared otherwise
V: Always reset to 0
S: Set if the result bit 7 is set; cleared otherwise
H: Unaffected
0: Unaffected
If the source operand is the immediate value %78 (011111011) and the register named
TARGET contains %C3 (11000011), the statement
OR TARGET,
11%7B
leaves the value %BB (10111000) in the register.
When used to specify a 4-bit working-register address, address modes R or IR use the
format:
E src/dst