ZiLOG Z8 Technical Manual page 75

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RRC
dst
Instruction For.at:
RRC
Rotate Right Through Carry
Cycles
OPC
(Hex)
Address Mode
dst
~
______ OP_C ______
~11 ~
_______
d_s_t ______
~
6
6
CO
C1
R
IR
Operation:
Hsgs:
Example:
Note:
dst(7)
<--
C
C
<--
dst(O)
dst(n)
<--
dst(n
+
1)
n
= 0 - 6
The contents of the destination operand with the C flag are rotated right one bit
position.
The initial value of bit 0 replaces the C flag; the initial value of the
C flag replaces bit 7.
C:
Set if the bit rotated from the least significant bit position was 1; i.e., bit 0
was 1
Z:
Set if the result is zero; cleared otherwise
V:
Set if arithmetic overflow occurred, that is, the sign of the destination changed
during rotation; cleared otherwise
S:
Set if the result bit 7 is set; cleared otherwise
H:
Unaffected
0:
Unaffected
If the contents of the register named SHIFTER are %DO (11011101) and the Carry flag
is reset to 0, the statement
RRC SHIFTER
sets the C flag and the V flag and leaves the value %6E (01101110) in the register.
When used to specify a 4-bit working-register address, address modes R or IR use the
format:
E
dst
5-41

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