UG-184
Table 5. Link Options
Link No.
Description
LK1
This link selects the source of the digital power supply.
Position A selects the source from the SDP board.
Position B selects the source from Connector J2.
LK3
This link selects the voltage source for the IOV
Position A connects IOV
Position B selects an externally applied voltage at Pin 5 of J6.
LK4
This link selects the state of the LDAC pin.
When this link is inserted, LDAC is at logic low.
When this link is removed, LDAC is at logic high.
LK5
This link selects the state of the CLR pin.
When this link is inserted, CLR is at logic low.
When this link is removed, CLR is at logic high.
LK6
This link selects the state of the RESET pin.
When this link is inserted, RESET is at logic low.
When this link is removed, RESET is at logic high.
LK8
This link selects the positive reference source.
Position A selects an on-board generated 10 V, derived from 5 V applied at Connector VREF.
Position B selects an external voltage applied at Connector VREFP.
LK9
This link selects the negative reference source.
Position A selects an external voltage applied at Connector VREFN.
Position B selects AGND.
Position C selects an on-board generated −10 V, derived from 5 V applied at Connector VREF.
pin.
CC
to V
.
CC
CC
Rev. 0 | Page 4 of 16
Evaluation Board User Guide
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