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SP2060
3-3.
PLLP2 Test (NO. 03)
Content: Compares and checks registers (00h, 0Fh, 10h, 16h) of the PLLP2 by writing and reading them.
Example of execution screen
*** 03. PLLP2 ***
0x00 W/R OK!
0x0F W/R OK!
0x10 W/R OK!
0x16 W/R 0x16 W:0x0F R:0x00
EXIT:[ENTER]
Troubleshooting:
In case of NG, check the signal line, such as the address bus, data bus and control signal, connected between PLLP2
(DSP circuit board: IC502) and CPU (CPU circuit board: IC002).
Or the PLLP2 may be defective.
3-4.
DSP7 Test (NO. 04)
Content: Writes and reads register of DSP7 to check the DataBus and AddressBus for normality.
SDRAM of DSP7 is written and read via registers to compare and check.
Example of execution screen
(1) Display Screen at OK
*** 04. DSP7 ***
DSP7 CPUIF DATABUS---
CHIP #0 OK!
DSP7 CPUIF ADRBUS---
CHIP #0 OK!
DSP7 CPUIF CHIPSEL---
CHIP #0 OK!
DSP7 ERAMIF DATABUS---
CHIP #0 OK!
DSP7 ERAMIF ADRBUS---
CHIP #0 OK!
...THE END OF DIAGNOSTICS
---------------------
ALL TESTS ARE OK(^-^)
---------------------
EXIT:[ENTER]
40
Displayed at OK
Displayed at NG
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