Yamaha SP2060 Service Manual page 18

Speaker processor
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SP2060
• HD6417727F160CV (X2890B00) CPU (Microprocessor 32 bit)
Pin
Name
I/O
no.
1
Vcc-RTC
2
XTAL2
3
EXTAL2
4
Vss-RTC
5
MD1
6
MD2
7
NMI
8
IRQ0/IRL0_/PTH[0]
9
IRQ1/IRL1_/PTH[1]
10
IRQ2/IRL2_/PTH[2]
11
IRQ3/IRL3_/PTH[3]
12
IRQ4/PTH[4]
13
VEPWC
O
14
VCPWC
15
MD5
16
/BREQ
17
/BACK
18
VssQ
19
CKIO2
20
VccQ
21
D31/PTB[7]
I/O
22
D30/PTB[6]
I/O
23
D29/PTB[5]
I/O
24
D28/PTB[4]
I/O
25
D27/PTB[3]
I/O
26
D26/PTB[2]
I/O
27
D25/PTB[1]
I/O
28
D24/PTB[0]
I/O
29
VssQ
30
D23/PTA[7]
I/O
31
VccQ
32
D22/PTA[6]
I/O
33
D21/PTA[5]
I/O
34
D20/PTA[4]
I/O
35
Vss
36
D19/PTA[3]
I/O
37
Vcc
38
D18/PTA[2]
I/O
39
D17/PTA[1]
I/O
40
D16/PTA[0]
I/O
41
D15
42
VssQ
43
D14
44
VccQ
45
D13
46
D12
47
D11
48
D10
49
D9
50
D8
51
D7
52
D6
53
VssQ
54
D5
55
VccQ
56
D4
57
D3
58
D2
59
D1
60
D0
61
A0
62
A1
63
A2
64
VssQ
65
A3
18
Function
-
Power supply for RTC (1.9V)
-
Not in use (XTAL for internal RTC)
-
-
Power supply for RTC (0V)
-
Clock mode setting
-
-
Not in use (Non-maskable interrupt request)
I
I
I
External interrupt request
I
I
VEE control pin for LCD panel
-
VCC control pin for LCD panel
-
Big endian setting
-
Not in use (bus request)
-
Bus acknowledge
-
VssQ
-
System clock output
-
VccQ
Data bus
-
VssQ
Data bus
-
VccQ
Data bus
-
Vss
Data bus
-
Vcc
Data bus
-
-
VssQ
-
Data bus
-
VccQ
-
-
-
-
Data bus
-
-
-
-
-
VssQ
-
Data bus
-
VccQ
-
-
-
Data bus
-
-
-
-
Address bus
-
-
VssQ
-
Address bus
Pin
Name
I/O
no.
66
VccQ
-
67
A4
-
68
A5
-
69
A6
-
70
A7
-
71
A8
-
72
A9
-
73
A10
-
74
A11
-
75
VssQ
-
76
A12
-
77
VccQ
-
78
A13
-
79
A14
-
80
A15
-
81
A16
-
82
A17
-
83
A18
-
84
A19
-
85
A20
-
86
VssQ
-
87
A21
-
88
VccQ
-
89
A22
-
90
A23
-
91
Vss
-
92
A24
-
93
Vcc
-
94
A25
-
95
BS_/PTK[4]
O
96
RD_
-
97
WE0_/DQMLL
O
98
WE1_/DQMLU/WE
O
99
WE2_/DQMUL/ICIORD_/PTK[6]
O
100
VssQ
-
101
WE3_/DQMUU/ICIOWR_/PTK{7}
O
102
VccQ
-
103
RD/WR_
O
104
PTE[7]/PCC0RDY/AUDSYNC_
O
105
/CS0
-
106
/CS2
-
107
/CS3
-
108
/CS4/PTK[2]
O
109
/CS5/CE1A_/PTK[3}
O
110
/CS6/CE1B_
O
111
CE2A_/PTE[4]
O
112
CE2B_/PTE[5]
O
113
AFE_HC1/USB1d_DPLS/PTK[0]
O
114
AFE_RLYCNT_/USB1d_DMNS/PTK[1]
O
115
VssQ
-
116
AFE_SCLK/USB1d_TXDPLS
I
117
VccQ
-
118
PTM[7]/PTINT[7]/AFE_FS/USB1d_RCV
I
119
PTM[6]/PTINT[6]/AFE_RXIN/USB1d_SPEED
I
120
PTM[5]/PTINT[5]/AFE_TXOUT/USB1d_TXSE0
I
121
PTM[4]/PINT[4]/AFE_RDET_/USB1d_TXDMNS
I
122
Reserved/USB1d_SUSPEND
O
123
USB1_ovr_crnt/USBF_VBUS
I
124
USB2_ovr_crnt_
-
125
RTS2_/USB1d_TXENL
O
126
PTE[2]/USB1_pwr_en
O
127
PTE[1]/USB2_pwr_en
O
128
CKE/PTK[5]
O
129
/RAS3/PTJ[0]
O
130
Reserved/PTJ[1]
O
CPU: IC002
Function
VccQ
Address bus
VssQ
Address bus
VccQ
Address bus
VssQ
Address bus
VccQ
Address bus
Vss
Address bus
Vcc
Address bus
Not connected (bus cycle start signal)
Read strobe
Write 0 signal
Write 1 signal
Write 2 signal
VssQ
Write 3 signal
VccQ
Read/Write
I/O
Chip Select 0
Chip Select 2
Chip Select 3
Chip Select 4
Chip Select 5
Chip Select 6
Output port (SWP50 Reset)
Output port (PLG Board Reset)
SPD DATA
SPD CL
VssQ
Not in use (USB1 D+ transmission)
VccQ
Not in use
USB function VBUS
USB2_HOST2 over current detection
Not in use
USB1 voltage control
USB2 voltage control
Enable (SDRAM)
RAS for SDRAM
Not in use

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