Xerox 560 Reference Manual page 106

Condition code settings:
2 3
0 0 0
0 0 0
0
0
0 0
0
0
0 0
o
o
4 Result of PLM
0 Word count> 0
Word count
=
0
0
Word count
<
CC,
TVV
=
1
Word count
=
0,
TVV
=
1
0 Space count
=
0,
word count
<
CC,
f\N
=
1
Space count
=
0,
word count
=
0,
TW
=
1
0
15
Space count
+
CC > 2 -1,
TS
=
1
15
o
Space count
+
CC > 2
-1,
word count
<
CC, TS
=
1,
and TW
=
1
15
Space count
+
CC > 2 -1,
word count
=
0, TS
=
1,
and TW
=
1
1
Instruction
completed
Instru cti on
aborted
If the instruction operation extends into a memory page
protected either by the access protection codes or write
locks, the memory protection trap can occur. If the
operation extends into a memory region that is physically
not present, the nonexistent memory address trap can
occur.
If the address of the elements within the stack (pointed to
by the top-of-stack address) is in the range 0 through 15,
then the words to be !o(Jded ore taken from the genera!
registers rather than from main memory. In this case, the
results wi
II
be unpredictable if any of the source registers
are also used as destination registers.
MSP
MODIFY STACK POINTER
(Doubleword index alignment)
MODIFY STACK POINTER modifies the stack pointer
dcub!e\\'ord, !oceted at the effective doublewoid addiess
of MSP by the contents of register R. Register R must have
the following format:
100 Push-Down Instructions (Non-Privileged)
Bit positions 16 through 31 of register R are treated as a
signed integer, with negative integers in two's complement
form (i. e., a fixed-point halfword). The modifier is alge-
brai ca Ily added to the top-of-stack address, subtracted
from the space count, and added to the word count in the
stack pointer doubleword. If, as a resu It of MSP, either
the space count or the word count would be decreased be-
low 0 or increased above 2 15 _1, the instruction is aborted.
Then, the basic processor either traps to location X'42' or
sets the condition code to reflect the reason for aborting,
depending on the stack limit trap inhibits.
If the modification of the stack pointer doubleword can be
successfully performed, MSP operates as follows:
1.
The modifier in register R is algebraically added to the
current top-of-stack address (SPD15-31)t, to point to
a new top-of-stack location. (If the modifier is neg-
ative, it is extended to 17 bits by appending a high-
order 1.)
2. The modifier is algebraically subtracted from the cur-
rent space count (SPD33-47) and the result becomes
the new space count.
3. The modifier is algebraically added to the current
word count (SPD49-63) and the result becomes the new
word count.
4. The condition code is set to reflect the new status of
the new space count and new word count.
Affected: (SPD), CC Trap: Push-down stack limit
(SPD)15_31
+
(R)16-31SE - SPD 15-31 t
(SPD)33_47 - (R)16-31 - SPD 33 _ 47
(SPD)49_63
+
(R)16_31- SPD 49-63
Condition code settings:
2 3 4 Resu!t of MSP
o
0 0 0 Space count> 0,
word count > O.
0 0 0 Space count> 0,
word count
=
O.
o
0 0 Space count = 0,
o
o
word count>
O.
Space count
=
0,
word count = 0,
, . , . . 1"\
mOalTler
=
v.
Instruction completed
t For real extended mode of addressing this is a 20-bit
field (12-31); for real and virtual addressing modes it is a
17-bit fi e Id (15-31).