Dim Code Checkpoints; Single-Bit Ecc Error Throttling Prevention; Table 71. Dim Code Checkpoints - Intel SE7520BD2 Technical Product Specification

Error Reporting and Handling
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5.4.7

DIM Code Checkpoints

The Device Initialization Manager (DIM) module gets control at various times during BIOS
POST to initialize different BUSes. The following table describes the main checkpoints where
the DIM module is accessed.
Checkpoint
2A Initialize different buses and perform the following functions:
Reset, Detect, and Disable (function 0). Function 0 disables all device nodes, PCI devices,
and PnP ISA cards. It also assigns PCI bus numbers.
Static Device Initialization (function 1). Function 1 initializes all static devices that include
manual configured onboard peripherals, memory and I/O decode windows in PCI-PCI
bridges, and noncompliant PCI devices. Static resources are also reserved.
Boot Output Device Initialization (function 2). Function 2 searches for and initializes any
PnP, PCI, or AGP video devices.
38 Initialize different buses and perform the following functions:
Boot Input Device Initialization (function 3). Function 3 searches for and configures PCI
input devices and detects if system has standard keyboard controller.
IPL Device Initialization (function 4). Function 4 searches for and configures all PnP and
PCI boot devices.
General Device Initialization (function 5). Function 5 configures all onboard peripherals that
are set to an automatic configuration and configures all remaining PnP and PCI devices.
5.4.8

Single-bit ECC Error Throttling Prevention

The system detects, corrects, and logs correctable errors. As long as these errors occur
infrequently, the system should continue to operate without a problem.
Occasionally, correctable errors are caused by a persistent failure of a single component. For
example, a broken data line on a DIMM would exhibit repeated errors until replaced. Although
these errors are correctable, continual calls to the error logger can throttle the system,
preventing any further useful work from being performed. For this reason, the system counts
certain types of correctable errors and disables reporting if they occur too frequently.
When Error Logging is disabled, correction remains enabled but error reporting and logging is
disabled for all further events. For example, if DIMM 1 has persistent failure and Event Logging
is disabled, system BIOS will not log errors of all DIMMs in the memory. The system BIOS
implements this feature for correctable memory errors. If ten errors occur in a single wall-clock
hour, the corresponding error handler disables further reporting of the error. This allows the
system to continue running, despite a persistent correctable failure. The BIOS adds an entry to
the event log to indicate that logging for that type of error has been disabled as per the IPMI
specification. Such an entry indicates a serious hardware problem that must be repaired at the
earliest possible time.
The BIOS re-enables logging and SMIs the next time the system is rebooted.
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Intel® Server Board SE7520BD2 Technical Product Specification
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Table 71. DIM Code Checkpoints

Description
Revision 1.3