Intel 80960HA Datasheet page 92

32-bit high-performance superscalar processor
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80960HA/HD/HT
Example 1. Boundary-Scan Description Language (BSDL) for PGA
Package Example (Sheet 5 of 8)
attribute Tap_Scan_In
attribute Tap_Scan_Mode
attribute Tap_Scan_Out
attribute Tap_Scan_Reset of
attribute Tap_Scan_Clock of
attribute Instruction_Length of Ha_Processor: entity is 4;
attribute Instruction_Opcode of Ha_Processor: entity is
attribute Instruction_Capture of Ha_Processor: entity is "0001";
attribute Instruction_Private of Ha_Processor: entity is "Reserved" ;
attribute Idcode_Register of Ha_Processor: entity is
attribute Register_Access of Ha_Processor: entity is
{***************************************************************************}
{
The first cell, cell 0, is closest to TDO
{
BC_1:Control, Output3
{***************************************************************************}
92
of
of
of
"BYPASS
(1111)," &
"EXTEST
(0000)," &
"SAMPLE
(0001)," &
"IDCODE
(0010)," &
"RUBIST
(0111)," &
"CLAMP
(0100)," &
"HIGHZ
(1000)," &
"Reserved
(1011, 1100)";
"0010"
&
"1000100001000000" &
"00000001001"
&
"1";
"Runbist[32]
(RUBIST)," &
"Bypass
(CLAMP, HIGHZ)";
CBSC_1:Bidir
TDI
: signal is true;
TMS
: signal is true;
TDO
: signal is true;
TRST
: signal is true;
TCK
: signal is (66.0e6, BOTH);
--version,
--part number
--manufacturers identity
--required by the standard
BC_4: Input, Clock
}
}
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