Intel 80960HA Datasheet page 85

32-bit high-performance superscalar processor
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Table 26. 80960Hx Boundary Scan Chain (Sheet 2 of 4)
#
NOTES:
1. Cell#1 connects to TDO and cell #112 connects to TDI.
2. All outputs are tri-state.
3. In output and bidirectional signals, a logical 1 on the enable signal enables the output. A logical 0
tri-states the output.
Datasheet
Boundary Scan Cell
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
BTERMBAR
RDYBAR
HOLD
HOLDA
Enable for HOLDA control
ADSBAR
BE3BAR
BE2BAR
BE1BAR
BE0BAR
BLASTBAR
DENBAR
WRRDBAR
DTRBAR
Enable for DTRBAR
WAITBAR
BSTALL
DATACODBAR
USERSUPBAR
Enable for ADSBAR, BEBAR,
BLASTBAR, DENBAR, WRRDBAR,
WAITBAR, DCBAR, SUPBAR and
LOCKBAR,
Cell Type
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Input
Appears as READYBAR in BSDL
Input
file.
Input
Output
Control
Output
Appears as BEBAR(3:0) in BSDL
Output
file.
Output
Output
Output
Output
Output
Output
Appears as WRBAR in BSDL file.
Output
Control
Output
Output
Output
Appears as DCBAR in BSDL file.
Output
Appears as SUPBAR in BSDL file.
Control
80960HA/HD/HT
Comment
85

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