SOYO SY-K7AIA User Manual page 66

BIOS Setup Utility
CHIPSET FEATURES SETUP (Continued)
CHIPSET
FEATURES
SDRAM PH
Limit
SDRAM Idle
Limit
SDRAM Trc
Timing Value
SDRAM Trp
Timing Value
SDRAM Tras
Timing Value
SDRAM CAS
Latency
SDRAM Trcd
Timing Value
Spread
Spectrum
Modulated
Setting Description
This option specifies the number of
32
consecutive Page-Hit requests to
allow before choosing a non-Page-
1,4,32,64
Hit request.
8 This option specifies the number of
idle cycles to wait before
0,8,12,16,
precharging an idle bank.
24,32,48
8
This option specifies the minimum
time from activate to activate of the
3,4,5,6,7,
same bank.
8
3 This option specifies the delay from
precharge command to activate
2,3
command.
5 This option specifies the minimum
bank (SRAS[2:0]#) active time.
2,3,4,5,6,
7
3 This option specifies the delay from
JSCAS [2:0]# to data valid.
2,3
2 This option specifies the delay from
the activation of a bank to the time
that a read or write command is
1,2,3,4
accepted.
10% When using Spread Spectrum
(Down) Modulated 10% (Down) or -0.5%
(Down) for FCC or DOC testing.
-0.5%
(Down)
62
SY-K7AIA
Note
Default