Preface: About This Guide; Rocketio Features; Guide Contents - Xilinx RocketIO User Manual

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About This Guide
The RocketIO Transceiver User Guide provides the product designer with the detailed technical
information needed to successfully implement the RocketIO™ multi-gigabit transceiver in
Virtex-II Pro Platform FPGA designs.

RocketIO Features

The RocketIO transceiver's flexible, programmable features allow a multi-gigabit serial transceiver
to be easily integrated into any Virtex-II Pro design:
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Guide Contents

The RocketIO Transceiver User Guide contains these sections:
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RocketIO™ Transceiver User Guide
UG024 (v2.3.2) June 24, 2004
Variable-speed, full-duplex transceiver, allowing 600 Mb/s to 3.125 Gb/s baud transfer rates
Monolithic clock synthesis and clock recovery system, eliminating the need for external
components
Automatic lock-to-reference function
Five levels of programmable serial output differential swing (800 mV to 1600 mV peak-peak),
allowing compatibility with other serial system voltage levels
Four levels of programmable pre-emphasis
AC and DC coupling
Programmable 50Ω/75Ω on-chip termination, eliminating the need for external termination
resistors
Serial and parallel TX-to-RX internal loopback modes for testing operability
Programmable comma detection to allow for any protocol and detection of any 10-bit
character.
Preface, "About This Guide" — This section.
Chapter 1, "RocketIO Transceiver Overview"
and how it works.
Chapter 2, "Digital Design Considerations"
communications protocol primitives; VHDL/Verilog code examples for clocking and reset
schemes; transceiver instantiation; 8B/10B encoding; CRC; channel bonding.
Chapter 3, "Analog Design Considerations"
clock/data recovery; PCB design requirements.
Chapter 4, "Simulation and Implementation"
debugging and diagnostics.
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— An overview of the transceiver's capabilities
— Ports and attributes for the six provided
— RocketIO serial overview; pre-emphasis; jitter;
— Simulation models; implementation tools;
Preface
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