Chapter 1: Kcu1250 Ibert Getting Started Guide; Overview - Xilinx Kintex UltraScale FPGA KCU1250 Getting Started Manual

KCU1250 IBERT Getting Started Guide

Overview

This document describes setting up the Kintex® UltraScale™ FPGA KCU1250 GTH
Transceiver Characterization Board and running the Integrated Bit Error Ratio Test (IBERT)
demonstration using the Vivado® Design Suite. The designs required to run the IBERT
demonstration are stored in a Secure Digital (SD) memory card provided with the KCU1250
board. The demonstration shows the capabilities of the Kintex UltraScale
XCKU040-FFVA1156 FPGA GTH transceiver.
The KCU1250 board is described in detail in the KCU1250 Board User Guide (UG1057)
[Ref 1].
The IBERT demonstration operates one GTH Quad. The procedure consists of:
1. Setting Up the KCU1250 Board
2. Extracting the Project Files
3. Connecting the GTH Transceivers and Reference Clocks
4. Starting the SuperClock-2 Module
5. Configuring the FPGA
6. Setting Up the Vivado Design Suite
7. Viewing GTH Transceiver Operation
8. Closing the IBERT Demonstration
KCU1250 IBERT Getting Started Guide
UG1061 (v2017.4) December 20, 2017 www.xilinx.com
Chapter 1
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