Register Page Pointer (Pp) - Samsung S3F80P5X User Manual

S3F80P5_UM_ REV1.00

REGISTER PAGE POINTER (PP)

The S3C8/S3F8-series architecture supports the logical expansion of the physical 333-byte internal register files
(using an 8-bit data bus) into as many as 16 separately addressable register pages. Page addressing is
controlled by the register page pointer PP (DFH, Set 1, and Bank0). In the S3F80P5 microcontroller, a paged
register file expansion is not implemented and the register page pointer settings therefore always point to "page
0".
Following a reset, the page pointer's source value (lower nibble) and destination value (upper nibble) are always
'0000'automatically. Therefore, S3F80P5 is always selected page 0 as the source and destination page for
register addressing. These page pointer (PP) register settings, as shown in Figure 2-4, should not be modified
during normal operation.
Destination Register Page Seleciton Bits:
0 0 0 0
NOTE:
Register Page Pointer (PP)
DFH ,Set 1, Bank0, R/W
MSB .7 .6 .5
Destination: page 0
A hardware reset operation writes the 4-bit destination and source values shown
above to the register page pointer. These values should not be modified to
address other pages.
Figure 2-4. Register Page Pointer (PP)
.4 .3 .2 .1
Source Register Page Selection Bits:
0 0 0 0
.0 LSB
Source: page 0
ADDRESS SPACE
2-7