Basic Timer Control Register (Btcon) - Samsung S3F80P5X User Manual

S3f80p5 microcontrollers
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BASIC TIMER and TIMER 0

BASIC TIMER CONTROL REGISTER (BTCON)

The basic timer control register, BTCON, is used to select the input clock frequency, to clear the basic timer
counter and frequency dividers, and to enable or disable the watch-dog timer function. It is located in Set 1 and
Bank0, addresses D3H, and is read/write addressable using register addressing mode.
A reset clears BTCON to '00H'. This enables the watch-dog function and selects a basic timer clock frequency of
fOSC/4096. To disable the watch-dog function, you must write the signature code '1010B' to the basic timer
register control bits BTCON.7–BTCON.4. For improved reliability, using the watch-dog timer function is
recommended in remote controllers and hand-held product applications.
MSB
Watch-dog Timer Enable Bits:
1010B = Disable watch-dog function
Others = Enable watch-dog function
10-2
Basic Timer Control Register (BTCON)
D3H, Set 1, Bank 0 , R/W
.7
.6
.5
.4
Figure 10-1. Basic Timer Control Register (BTCON)
.3
.2
.1
.0
Divider Clear Bit for BT and T0:
0 = No effect
1 = Clear both dividers
Basic Timer Counter Clear Bits:
0 = No effect
1 = Clear BTCNT
Basic Timer Input Clock Selection Bits:
00 = f
/4096
OSC
01 = f
/1024
OSC
10 = f
/128
OSC
11 = f
/16384
OSC
S3F80P5_UM_ REV1.00
LSB

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