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2.3.3 Memory throughput
The memory subsystem throughput is based on the speed of the memory. An elastic
interface, contained in the POWER5 chip, buffers reads and writes to and from memory and
the processor. There are two SMIs, each with a single 8-byte read and 2-byte write DDR bus
to the processor. A DDR bus allows double reads or writes per clock cycle. Since 266 MHz
memory is installed (operating at 266.5 MHz), the throughput is (16 x 2 x 266.5) + (4 x 2 x
266.5) or 10660 MB/second or 10.41 GB/second between the processor and memory
controller. These values are maximum theoretical throughputs for comparison purposes only.
There are four 8-byte paths to the memory DIMMs from the SMIs; therefore, the throughput is
8.32 GB/second.
The POWER5 processor's integrated memory controller further reduces latency to the SMI
chips by requiring fewer cycles in order to set up memory addressing in the hardware.
2.4 System buses
The following sections provide additional information related to the internal buses.
2.4.1 GX+ and RIO-2 buses
The processor module provides a GX+ bus that is used to connect to the I/O subsystem. GX+
bus clock frequency is 550 MHz with a CPU to GX+ ratio of 3:1.
The GX+ bus is connected to an internal Remote I/O-2 bus on the system board through a
RIO-2 hub. Two RIO-2 buses are available inside the system. Each RIO-2 bus provides
1 byte at 1 GHz in each direction, which leads to a theoretical maximum bandwidth of 4 GB/s.
Note: The OpenPower 710 server has no external RIO-2 ports and therefore additional
external storage must be attached using other connections, such as network or SCSI.
2.5 Internal I/O subsystem
The internal I/O subsystem and the service processor reside directly on the system planar.
There is an internal RIO-2 bus imbedded in the system planar. The system planar contains
both the RIO-2 hub and the PCI-X host bridge chip to connect to the integrated I/O packaged
on the system planar. Two RIO-2 ports of the RIO-2 hub chip are used for the integrated I/O,
and the remaining two ports are unused.
The PCI -X riser card provides three PCI-X slots and is plugged directly into the system
planar. The PCI-X riser card is connected exclusively to one of the two PCI-X to PCI-X
bridges. The remaining integrated PCI-X devices interface to the second PCI-X to PCI-X
bridge. Both PCI-X to PCI-X bridges are connected to the primary PCI-X buses on the PCI-X
host bridge chip.
All PCI-X slots (1 trough 3) can accept long PCI-X or PCI cards. They are all 64-bit, 3.3 volts,
133 MHz.
Chapter 2. Architecture and technical overview
21
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