North Bridge Configuration - Asus P5BV - Motherboard - ATX Installation Manual

North Bridge Configuration

North Bridge chipset Configuration
Memory Remap Feature
Configure DRAM Timing by SPD
Initiate Graphics Adapter
Internal Graphics Mode select
PEG Port Configuration
PEG Link Mode
Memory Remap Feature [Disabled]
Allows you to remap the overlapped PCI memory above the total physical memory.
Configuration options: [Disabled] [Enabled]
Configure DRAM Timing by SPD [Enabled]
When this item is enabled, the DRAM timing parameters are set according to the
DRAM SPD (Serial Presence Detect). When disabled, you can manually set the
DRAM timing parameters through the DRAM sub-items. The following sub-items
appear when this item is Disabled. Configuration options: [Enabled] [Disabled]
DRAM CAS# Latency [5]
Controls the latency between the SDRAM read command and the time the
data actually becomes available. Configuration options: [3] [4] [5] [6]
DRAM RAS# to CAS# Delay [6 DRAM Clocks]
Controls the latency between the DDR SDRAM active command and the
read/write command. Configuration options: [2 DRAM Clocks] [3 DRAM
Clocks] [4 DRAM Clocks] [5 DRAM Clocks] [6 DRAM Clocks]
DRAM Write Recovery Time [6 DRAM Clocks]
Configuration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks]
[5 DRAM Clocks] [6 DRAM Clocks]
DRAM TRFC [30 DRAM Clocks]
Configuration options: [20 DRAM Clocks] [25 DRAM Clocks] [30 DRAM
Clocks] [35 DRAM Clocks] [42 DRAM Clocks]
DRAM RAS# Precharge [6 DRAM Clocks]
Controls the idle clocks after issuing a precharge command to the DDR
SDRAM. Configuration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM
Clocks] [5 DRAM Clocks] [6 DRAM Clocks]
DRAM RAS# Activate to Precha [15 DRAM Clocks]
Configuration options: [4 DRAM Clocks] [5 DRAM Clocks]...[18 DRAM Clocks]
ASUS P5B-V
[Disabled]
[Enabled]
[PEG/PCI]
[Enabled]
[Auto]
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