E05A16Ga Gate Array Functions - Epson LQ 1050 - B/W Dot-matrix Printer Technical Manual

2.3.3.3 E05A16GA Gate Array Functions

The E05A16GA gate array is selected by the CS signal (pin 37: decoded by the higher address in the
E05A 15HA) from the E05A15HA gate array (3A), and the internal function of this gate array is activated
when the CPU reads or writes data at the memory mapped address ,(lower address: AO through A3).
Table 2-5 shows the pin assignments for this gate array. Refer to the Appendix for the detailed
specifications on this gate array.
Pin No.
I
4
5
6
7
8
9
14
15
17
I
18
19
2 0
21
22
23
24
25
26
27
28
29
3 0
31
32
33
34
35
Signal Name
D4
I
D7
I
STRB
IN 1
I
BUSY
ACK
PE
ERR
Pc 1
PD 1
PDO
VDD
Direction
Data bus bit 4-7
IN/OUT
Not used
IN
IN Initialize signal (IN IT) input: Low active signal
—
Logic ground
Power-on reset signal
IN
Parallel data (D7-D2)
IN
IN Strobe signal
Parallel data (D1-DO)
IN
Reset signal output which the RSTIN1 or RSTIN2
OUT
signal is input.
BUSY signal
OUT
OUT Acknowledge signal
Paper End signal
OUT
OUT ERROR signal
Carriage motor control signal
OUT
OUT Buzzer control signal
OUT Plunger solenoid ON/OFF control signal
Carriage motor control signal
OUT
OUT RXD Signal output
OUT Carriage motor Power-down signal
+ 24V DC control signal
OUT
IN FONT switch (control panel) status monitor
IN Power source
IN PITCH switch (control panel) status monitor
IN CONDENSED switch (control panel) status monitor
—
Logic ground
Function
REV.-A