Omron CP1L CPU UNIT - 03-2009 Operation Manual page 196

Index Registers
Variation
Indirect addressing The content of IR@ is treated as
the PLC memory address of a bit
or word.
Indirect addressing The constant prefix is added to the
with constant offset content of IR@ and the result is
treated as the PLC memory
address of a bit or word.
The constant may be any integer
from –2,048 to 2,047.
Indirect addressing The content of the Data Register
with DR offset is added to the content of IR@ and
the result is treated as the PLC
memory address of a bit or word.
Indirect addressing After referencing the content of
with auto-increment IR@ as the PLC memory address
of a bit or word, the content is
incremented by 1 or 2.
Indirect addressing The content of IR@ is decre-
with auto-decrement mented by 1 or 2 and the result is
treated as the PLC memory
address of a bit or word.
162
(2) When an Instruction Execution Error or an Illegal Access Error is gener-
ated during the execution of a certain instruction, the auto-increment/dec-
rement for the rest Index Registers of the instruction will not execute.
(3) An Illegal Access Error will be generated when indirectly addressing
memory in D10000 to D31999 with Index Registers for CPU Units with
10, 14 or 20 I/O Points.
The following table shows the variations available when indirectly addressing
I/O memory with Index Registers. (IR@ represents an Index Register from IR0
to IR15.)
Function
,IR@
Constant ,IR@
(Include a + or –
in the constant.)
DR@,IR@
Increment by 1:
,IR@+
Increment by 2:
,IR@++
Decrement by 1:
,–IR@
Decrement by 2:
,– –IR@
Syntax
LD ,IR0
LD +5,IR0
LD
DR0,IR0
LD , IR0++
LD , – –IR0 Decrements the content of
Section 4-11
Example
Loads the bit at the PLC
memory address contained
in IR0.
Adds 5 to the contents of IR0
and loads the bit at that PLC
memory address.
Adds the contents of DR0 to
the contents of IR0 and
loads the bit at that PLC
memory address.
Loads the bit at the PLC
memory address contained
in IR0 and then increments
the content of IR0 by 2.
IR0 by 2 and then loads the
bit at that PLC memory
address.