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Address Bus A7
Address Bus A5
Address Bus A11
10
:
D
D
D
OMi
FSH
AM2
RAM2 Chip Enable
AM1
RAM1 Chip Enable
LE
Address Latch Enable
Write Enable
CLR
CRTRG
Carriage Trigger
HTR
Even Head PIN Trigger
HTRG
Odd Head PIN Trigger
Interrupt Request 0
Interrupt Request 2
RESET
+5V
revel
m|O]@]@/NId
S$
CO) =
io
aes
3|_l|s
.
21/2
S
wo
7
—
2 fe)
Cc
-~
PIS
IO]/<|
Ol;
|S
P|P
P|
P|
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OyZIO/zIiCig
oo
Ton
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N
i
4
2
3
ibe]
G3} G2] G2
| GO] @ | G
| @ PO [P
Le) =/>
=/>|n/v/D|/
D/D|>
D
<|
D) S|S/O|}|m
8 al 3/3
mi
*|°
4 io)
2 (3/3
|5 2
9/O!19/O
0
e€jcjcic
Cc
oe
lert
lati
-
[oe [rm
[41 | enn | Groug
42 | GND
| Ground
Tn
[43 | HDCO6 | Head CommonOdd6
| _Out |
[44 | HDcEs | HeadCommonEven3
|
Out |
[45 | HDCE2 | HeadCommonEven2
|
Out |
[46 | HDcE6 | HeadCommonEvené
|
Out |
| 47 | HDco2 [ HeadCommonOdd2
|u|
[48 | HDcos | HeadCommonOdd3
(Out |
[49 | HDCOs | HeadCommonOdd5
(Out |
[50 | HDCO1 | HeadCommonOdd1
|
Out |
[si | HDCE4 [| HeadCommonEven4
|
Out |
[52 | HDCE1 | HeadCommonEvent
|
Out |
[53 | HOcES | HeadCommonEven5
|
Out |
| 54 | HDCco4 | HeadCommonOdd4
|
Out |
res [Hs | HeadPinis
—SSSCS~dS:Ct
sé | Ho
[ HeadPing
(Ot
[s7 | Hi
[| HeadPint
s(t
Psa | H7
| HeadPin7?
(Out
| 59 | H22
| HeadPin22
|
(Out |
}60 | Hi9 | HeadPintg
(Ot
|
[61 | GND
[| Ground
in
P62 | Hii
| HeadPintt?
=|
Out |
Pes | Hs
| HeadPind
(Out
P64 | Hs
| HeadPin5
(Out
Pes | His
| HeadPinis
(Out
P66 | Het
| HeadPingi
Out
|
[67 | Heo
| HeadPin200
Out
|
68 | Hi4
[| HeadPint4
Out
|
Peo | He
[| HeadPing
|
t |
| 70 | H4 [| HeadPing
(ut
P71 | Hi2~ [ HeadPint2
|
(Out
H17
Head Pin 17
| Out |
Hed
[Head Pingé
Out
|
Hié
[| HeadPinté
Out
|
P75 | Hio | HeadPinto
(Out
P76 | He | HeadPine————~«diC~C
[77 [| He
| HeadPing =
(Ot
pve [Hie [ HeadPint@
«Cut
[79 |_ GND [Ground
tn
[80 [GND
[Ground
8-27
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