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(a)
(e
—
(f)
Hl
1
1
4
i
1
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i
i
(4) Gate Array
The gate array (IC6) is a 160 pin Flat Package and it consists of seven blocks.
Head Drive Controller
The 24 Print Head Pins are controlled by an even or odd pin group controller. The Head Pin Trigger Pulse
triggers generation of the Head Pin Signal from each group.
Decoder
It is used for accessing ROM and RAMs, and used for refreshing RAMs.
Handshake Interface
in this gate array, the Centronics Parallel interface (usually called Handshake Interface) is prepared. The
busy signal to the host computer is generated automatically when receiving the DSTB (data strobe) signal.
The ACK (acknowledge) signal is also generated automatically when the busy signal turns to L level
(Ready state).
Pulse Generator for Stepper Motor
In this gate array the pulse generator for the stepper motor is prepared. This function is used for the
carriage spacing motor and line feed motor. The motor driving pattern is generated automatically when the
generator receives the starting signal. This pattern is synchronized with the output of the timer which
determines motor pulse rate.
Input Port
Input port is used for control panel switches, sensors and serial interface detection.
LED Interface
Three control signals are sent from the gate array to control the LED driver IC.
The LED data signal
determines which LED is going to be lit. The data is serially sent and synchronized with the Shift CLK and
Latch LCK signals.
Trigger (EHTRG)
Trigger (OHTRG)
ODD Head Pin
Controller
Even Head Pin
Controller
LED Data
LED Interface
[-+—>LED Shift CLK
7
LED Latch CLK
Carriage Motor
Controller
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