Processor 7/7- Rsvd - Clevo W655SJ Service Manual

Processor 7/7- RSVD

5
CFG Straps for Processor
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
D (Default)
CFG2 1: (DEFAULT)NORMAL OPERATION;
LANE# DEFINITION MATCHES
0: LANE REVERSAL
CFG2 R66 R66 *1K_04 *1K_04
DISPLAY PORT PRESENCE STRAP
1: DISABLED;
CFG4
NO PHYSICAL DISPLAY PORT ATTACHED
TO EMBEDDED DISPLAY PORT
0:ENABLED; AN EXTERNAL DISPLAY PORT DEVICE
AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED
(Default)
TO THE EMBEDDED DISPLAY PORT
C
CFG4 R68 R68 1K_04 1K_04
PCIE Port Bifurcation Straps
11: DEVICE1 FUNTION 1, DEVICE 1 FUNCTION2 DISABLED
10: DEVICE1 FUNCTION1 ENABLED DEVICE1 FUNCTION 2 DISABLED
01: DEVICE 1 FUNCTION 1 DISABLED, DEVICE 1 FUNCTION 2 ENABLED
CFG[6:5]
00: DEVICE 1 FUNCTION 1 ENABLED, DEVICE 1 FUNCTION 2 ENABLED
CFG5 R64 R64 *1K_04 *1K_04
CFG6 R378 R378 *1K_04 *1K_04
B
DEFENSIVE PULL DOWN SITE
CFG7 R63 R63 *1K_04 *1K_04
NOTE:
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
0 : ENABLED SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
1 : DISABLED
CFG3 R67 R67 *1K_04 *1K_04
A
5
4 3
Haswell Processor 7/7 ( RESERVED )
U26I U26I
AT1
RSVD_TP
AT2
RSVD_TP
AD10
RSVD
A34
RSVD_TP
A35
RSVD_TP
W29
RSVD_TP
W28
RSVD_TP
R357 R357 49.9_1%_04 49.9_1%_04 H_CPU_RSVD30 G26
TESTLO
W33
RSVD
AL30
RSVD
AL29
RSVD
F25
VCCIN
VCC
C35
RSVD_TP
B35
RSVD_TP
AL25
RSVD_TP
W30
RSVD_TP
W31
RSVD_TP
R359 R359 49.9_1%_04 49.9_1%_04 H_CPU_RSVD40 W34
TESTLO
AT20
CFG_0
AR20
CFG_1
CFG2 AP20
CFG_2
CFG3 AP22
CFG_3
CFG4 AT22
CFG_4
AN22
CFG5
CFG_5
CFG6 AT25
CFG_6
CFG7 AN23
CFG_7
AR24
CFG_8
AT23
CFG_9
AN20
CFG_10
AP24
CFG_11
AP26
CFG_12
AN25
CFG_13
AN26
CFG_14
AP25
CFG_15
4 3
2 1
Haswell rPGA EDS Haswell rPGA EDS
C23
RSVD_TP
B23
RSVD_TP
D24
RSVD_TP
D23
RSVD_TP
AT31 CFG_RCOMP R384 R384 49.9_1%_04 49.9_1%_04
CFG_RCOMP
AR21
CFG_16
AR23
CFG_18
AP21
CFG_17
AP23
CFG_19
AR33
RSVD
G6 FC_G6
FC
AM27
RSVD
AM26
RSVD
F5
RSVD
AM2
RSVD
K6
RSVD
E18
RSVD
U10
RSVD
P10
RSVD
B1
NC
A2
RSVD
AR1
RSVD_TP
E21
RSVD_TP
E20
RSVD_TP
AP27
VSS
AR26
VSS
AL31
VSS
AL32
VSS
9 OF 9 9 OF 9
NOTE:
RESERVE THIS CIRCUIT FOR FUTURE COMPATIBILITY
PM_PCH_PW ROK 22,36
R29 R29
*2K_1%_04 *2K_1%_04
FC_G6
R28 R28
*1K_04 *1K_04
! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/
Title Title Title
[08] PROCESSOR 7/7 [08] PROCESSOR 7/7 [08] PROCESSOR 7/7
Size Size Size Document Number Document Number Document Number
6-71-W65J0-D01 6-71-W65J0-D01 6-71-W65J0-D01
5,41 VCCIN Custom Custom Custom 6-7P-W 65J4-001 6-7P-W 65J4-001 6-7P-W 65J4-001
Date: Date: Date: W ednesday, October 16, 2013 W ednesday, October 16, 2013 W ednesday, October 16, 2013 Sheet Sheet Sheet
2 1
Schematic Diagrams
D
Sheet 8 of 46
C
Processor 7/7-
RSVD
B
A
Rev Rev Rev
1.0 1.0 1.0
8 8 8 of of of 46 46 46
Processor 7/7- RSVD B - 9