Apps Fpga Trigger Input; Figure 3-6. J3 Apps Fpga Test Point Header; Figure 3-7. Vc-707 Sw5 - Texas Instruments DLP LightCrafter DLPC910 User Manual

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3.7 Apps FPGA Trigger Input

On the DLPLCRC910EVM the trigger input for the DLPC910 is mediated through the Apps FPGA.
Connecting header J3 APPS_TSTPT7 (Pin 2) to
Xilinx VC-707 board (lower right corner) to advance patterns when pressed.

Figure 3-6. J3 Apps FPGA Test Point Header

DLPU124 – JUNE 2023
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J3 APPS_TSTPT6 (Pin 3) allows the use of SW5 on the AMD
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Figure 3-7. VC-707 SW5

DLP® LightCrafter™ DLPC910 Evaluation Module (EVM) 13