Control On-Board Clock Through Clock Controller Gui - Intel Agilex 7 FPGA I-Series User Manual

Transceiver (6 × f-tile) development
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Error Control
This control displays data errors detected during analysis and allows you to insert
errors:
Detected Errors: Displays the number of data errors detected in the hardware.
Inserted Errors: Displays the number of errors inserted into the transaction
stream.
Insert: Insert a one-word error into the transaction stream each time you click
the button. Insert error is only enabled during transaction performance analysis.
Clear: Resets the Detected Errors counter and Inserted Errors counter to zeros.
Figure 21.
The RDIMM Tab
Same with DDR4-COMP.

4.3. Control On-Board Clock through Clock Controller GUI

The Clock Controller GUI can change the on-board Si5391/Si5395-1/Si5395-2/Si5518.
The instructions to run Clock Controller GUI are stated in the
13. You can also start it using the BTS GUI icon "Clock".
The clock controller communicates with the system Intel MAX 10 device through a 10-
pin JTAG header J11 or USB port J10. Then, system Intel MAX 10 controls these
programmable clock parts through a 2-wire I
Note:
You cannot run the stand-alone Clock Controller GUI application when the BTS or
Power Monitor GUI is running at the same time. Si5518 can be controlled only when a
design in which the SPI interface is instantiated, such as the
the
board_test_system\image\ES folder
®
Intel Agilex
7 FPGA I-Series Transceiver (6 × F-Tile) Development Kit User
Guide
24
Run BTS GUI
2
C bus.
bts_config.sof
has been downloaded to the FPGA.
4. Board Test System
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