Circuit Diagram (Tally Board: 1/2) - Roland V-60HD Service Notes

Nov. 2017

Circuit Diagram (Tally Board: 1/2)

fig.d-tally-1.eps@L
RS-232C & TALLY1
D+3.3VD+3.3V D+3.3V
I2C_SCL
I2C_SDA
PCA9557_XRST
D+3.3V
D+3.3V
TP90
D+3.3V
D+3.3V
TP91
R2
10k
D
D+5V
6.3V 10uF C1
From MAIN Board CN58
D
14 14
TP6 TP7
GND
13 13
TP9
D+5V
12 12
D+3.3V_1 TP20
11 11
GND TP96
I2C_SCL_SH_3 10 10
TP5
I2C_SDA_SH_3
9
TP4
9
TALLY_XRST
8
TP3
8
232C_RXD L1
7
TP2
7
232C_TXD L2
6
TP1
6
GND
5
TP10
5
XRS_OFF L3
4
TP81
4
3
TP97
GND 3
2
TP99
422_TXD 2 RS422_Tx to MAIN(RACK Only)
1
TP100
422_RXD 1 RS422_Rx from MAIN(RACK Only)
CN1
TP11
14FMN-SMT-A-TF (LF)(SN)
D
38
TALLY Interface 1
0.5mA
IC10
PCA9557PW.118-PBF
D
5 14
TLY1_PST4
A2 I/O7
4 13
TLY1_PST3
A1 I/O6
D
3 12
TLY1_PST2
A0 I/O5
11
TLY1_PST1
I/O4
1 10
TLY1_PGM4
SCL I/O3
2 9
TLY1_PGM3
SDA I/O2
15 7
TLY1_PGM2
_RESET I/O1
6
TLY1_PGM1
I/O0
Slave Adress: 0011 000
Direction : OUTPUT
D D
TALLY Interface & GPO
0.5mA
IC11
PCA9557PW.118-PBF
D
5 14
GPO_4_CTRL
A2 I/O7
4 13
GPO_3_CTRL
A1 I/O6
3 12
GPO_2_CTRL
A0 I/O5
11
GPO_1_CTRL
I/O4
1 10
TLY1_PST6
SCL I/O3
2 9
TLY1_PST5
SDA I/O2
15 7
TLY1_PGM6
_RESET I/O1
6
TLY1_PGM5
I/O0
Slave Adress: 0011 001
Direction : OUTPUT
D D
GPI Interface
0.5mA
IC12
PCA9557PW.118-PBF
D
5 14
A2 I/O7
4 13
A1 I/O6
3 12
A0 I/O5
11
I/O4
1 10
SCL I/O3
2 9
SDA I/O2
15 7
_RESET I/O1
6
I/O0
Pin6 I/O0 open-drain
Slave Adress: 0011 010
Direction : INPUT
D D
D+3.3V
C2
10uF
6.3V
TP8
D
I2C_SCL
I2C_SDA
PCA9557_XRST
RS232C_Tx to MAIN
BLM18AG121SN1D
BLM18AG121SN1D RS232C_Rx from MAIN
BLM18AG121SN1D
XRS_OFF
TLY1_PGM1
TLY1_PGM2
TLY1_PGM3
TLY1_PGM4
TLY1_PST1
TLY1_PST2
TLY1_PST3
TLY1_PST4
D+3.3V
GPI_8
GPI_7
GPI_6
GPI_5
GPI_4
GPI_3
GPI_2
GPI_1
V-60HD
D+3.3V
UnPop
R29
1
Q9
DTA114EUAT106 (PB FREE)
R5 1k
TP134
D+3.3V
C3 0.1uF C4 0.1uF
25V 25V
D D
1
25V 25V
5 5
ANODE ANODE
3
TP21 TP24
IC1 IC2
QCPL-M614-500E QCPL-M614-500E
D D
TP22
TP23
NANOSMD
TP2
TP2
2SCR50
NANOSMD
TP2
R6
1k
TP2
2SCR50
1
3
QC