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S3C9454B/F9454B
EI
— Enable Interrupts
EI
SYM (2) ← 1
Operation:
An EI instruction sets bit 2 of the system mode register, SYM.2 to "1". This allows interrupts to be
serviced as they occur. If an interrupt's pending bit was set while interrupt processing was disabled
(by executing a DI instruction), it will be serviced when you execute the EI instruction.
Flags:
No flags are affected.
Format:
opc
Example:
Given: SYM = 00H:
EI
If the SYM register contains the value 00H, that is, if interrupts are currently disabled, the
statement "EI" sets the SYM register to 04H, enabling all interrupts. (SYM.2 is the enable bit for
global interrupt processing.)
SAM88RCRI INSTRUCTION SET
Bytes
Cycles
Opcode
1
4
(Hex)
9F
6-21
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