Samsung S3C9454B User Manual page 62

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S3C9454B/F9454B
PWMCON
— PWM Control Register
Bit Identifier
RESET Value
Read/Write
.7–.6
.5
.4
.3
.2
.1
.0
NOTE: PWMCON.3 is not auto-cleared. You must pay attention when clear pending bit. (refer to page 11-8).
.7
.6
0
0
R/W
R/W
PWM Input Clock Selection Bits
f
/64
0
0
OSC
f
/8
0
1
OSC
f
/2
1
0
OSC
f
/1
1
1
OSC
Not used for S3C9454B/F9454B
PWMDATA Reload Interval Selection Bit
0
Reload from 8-bit up counter overflow
1
Reload from 6-bit up counter overflow
PWM Counter Clear Bit
0
No effect
1
Clear the PWM counter (when write)
PWM Counter Enable Bit
0
Stop counter
1
Start (Resume countering)
PWM Overflow Interrupt Enable Bit (8-Bit Overflow)
0
Disable interrupt
1
Enable interrupt
PWM Overflow Interrupt Pending Bit
0
No interrupt pending (when read)
0
Clear pending bit (when write)
1
Interrupt is pending (when read)
1
No effect (when write)
.5
.4
.3
0
0
R/W
R/W
CONTROL REGISTERS
.2
.1
0
0
R/W
R/W
R/W
E3H
.0
0
4-15

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