Samsung S3C9454B User Manual page 129

RESET and POWER-DOWN
F
PROGRAMMING TIP — Sample S3C9454B/F9454B Initialization Routine
;--------------<< Interrupt Vector Address >>
ORG
VECTOR
;--------------<< Smart Option >>
ORG
DB
DB
DB
DB
;--------------<< Initialize System and Peripherals >>
ORG
RESET: DI
LD
LD
LD
LD
LD
LD
LD
LD
;--------------<< Timer 0 settings >>
LD
LD
;--------------<< Clear all data registers from 00h to 5FH >>
LD
RAM_CLR: CLR
INC
CP
JP
;--------------<< Initialize other registers >>
•
•
•
EI
8-6
0000H
00H,INT_9454
003CH
00H
00H
0E7H
03H
0100H
BTCON,#10100011B
CLKCON,#00011000B
SP,#0C0H
P0CONH,#10101010B
P0CONL,#10101010B
P1CON,#00001010B
P2CONH,#01001010B
P2CONL,#10101010B
T0DATA,#50H
T0CON,#01001010B
R0,#0
@R0
R0
R0,#0BFH
ULE,RAM_CLR
; S3C9454B/F9454B has only one interrupt vector
; 003CH, must be initialized to 0
; 003DH, must be initialized to 0
; 003EH, enable LVR (2.3 V)
; 003FH, internal RC (3.2 MHz in V
; disable interrupt
; Watch-dog disable
; Select non-divided CPU clock
; Stack pointer must be set
;
; P0.0–P0.7 push-pull output
; P1.0–P1.1 push-pull output
;
; P2.0–P2.6 push-pull output
; CPU = 3.2 MHz, interrupt interval = 6.4 msec
; f /256, Timer 0 interrupt enable
OSC
; RAM clear
;
;
;
; Enable interrupt
S39454B/F9454B
= 5 V )
DD