Table of Contents
Advertisement
S39454B/F9454B
Register Name
Port 0 data register
Port 1 data register
Port 2 data register
Port 0 control register (High byte)
Port 0 control register
Port 0 interrupt pending register
Port 1 control register
Port 2 control register (High byte)
Port 2 control register (Low byte)
PWM data register
PWM control register
STOP control register
A/D control register
A/D converter data register (High)
A/D converter data register (Low)
NOTE: – : Not mapped or not used, x: undefined
Table 8-1. Register Values After a Reset (Continued)
Mnemonic
P0
P1
P2
Locations E3H–E5H are not mapped
P0CONH
P0CON
P0PND
P1CON
P2CONH
P2CONL
Locations ECH–F1H are not mapped
PWMDATA
PWMCON
STOPCON
Locations F5H–F6H are not mapped
ADCON
ADDATAH
ADDATAL
Locations FAH–FFH are not mapped
Address
R/W
Hex
E0H
R/W
E1H
R/W
E2H
R/W
E6H
R/W
E7H
R/W
E8H
R/W
E9H
R/W
EAH
R/W
EBH
R/W
F2H
R/W
F3H
R/W
F4H
R/W
F7H
R/W
F8H
R
F9H
R
RESET and POWER-DOWN
Bit Values After RESET
7
6
5
4
3
2
0
0
0
0
0
0
–
–
–
–
0
–
0
0
0
0
0
–
0
0
0
0
0
0
0
0
0
0
0
0
–
–
–
0
0
–
0
–
–
0
0
0
0
0
0
0
0
–
0
0
0
0
0
0
0
0
0
0
0
0
0
–
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
x
x
x
x
x
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
x
x
x
8-5
Advertisement
Table of Contents
