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8-BIT PWM
PWM Data and Extension Registers
PWM (duty) data registers, located in F2H, determine the output value generated by each 8-bit PWM circuit.
To program the required PWM output, you load the appropriate initialization values into the 6-bit reference data
register (PWMDATA.7–.2) and the 2-bit extension data register (PWMDATA.1–.0). To start the PWM counter, or
to resume counting, you set PWMCON.2 to "1".
A reset operation disables all PWM output. The current counter value is retained when the counter stops. When
the counter starts, counting resumes at the retained value.
PWM Clock Rate
The timing characteristics of PWM output is based on the f
determined by the setting of PWMCON.6–.7.
Register Name
PWM data registers
PWM control registers
PWM Function Description
The PWM output signal toggles to Low level whenever the lower 6-bit of counter matches the reference data
register (PWMDATA.7–.2). If the value in the PWMDATA.7–.2 register is not zero, an overflow of the lower 6-bits
of counter causes the PWM output to toggle to High level. In this way, the reference value written to the reference
data register determines the module's base duty cycle.
The value in the upper 2-bits of counter is compared with the extension settings in the 2-bit extension data register
(PWMDATA.1–.0). This lower 2-bits of counter value, together with extension logic and the PWM module's
extension data register , is then used to "stretch" the duty cycle of the PWM output. The "stretch" value is one
extra clock period at specific intervals, or cycles (see Table 11-2).
If, for example, the value in the extension data register is '01B', the 2nd cycle will be one pulse longer than the
other 3 cycles. If the base duty cycle is 50 %, the duty of the 2nd cycle will therefore be "stretched" to
approximately 51% duty. For example, if you write 10B to the extension data register, all odd-numbered pulses will
be one cycle longer. If you write 11H to the extension data register, all pulses will be stretched by one cycle except
the 4th pulse. PWM output goes to an output buffer and then to the corresponding PWM output pin. In this way,
you can obtain high output resolution at high frequencies.
11-2
Table 11-1. PWM Control and Data Registers
Mnemonic
PWMDATA.7–.2
PWMDATA.1–.0
PWMCON
clock frequency. The PWM counter clock value is
OSC
Address
F2H.7–.2
6-bit PWM basic cycle frame value
F2H.1–.0
2-bit extension ("stretch") value
F3H
PWM counter stop/start (resume), and
PWM counter clock settings
S3C9454B/F9454B
Function
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